Inventor
Cristiano Calligaro
Inventor
Torre d'Isola, IT
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores57%
H10DInorganic electric semiconductor devices11%
H01LSemiconductor devices7%
H10BElectronic memory devices7%
G05FSystems for regulating electric or magnetic variables4%
G21HObtaining energy from radioactive sources4%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
H03KPulse technique4%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
PatentTitleYear
10,083,771Radioisotope power source embedded in electronic devices20189,287,284'Semiconductor field-effect transistor, memory cell and memory device'20168,759,915'Semiconductor field-effect transistor, memory cell and memory device'2014RE038166'Circuit and method for reading a memory cell that can store multiple bits of data'20036,016,271'Method and circuit for generating a gate voltage in non-volatile memory devices'20005,999,445'Multilevel non-volatile memory devices'19995,986,921'Clock circuit for reading a multilevel non volatile memory cells device'19995,973,966'Reading circuit for semiconductor memory cells'19995,883,837'Reading circuit for semiconductor memory cells'19995,838,612'Reading circuit for multilevel non volatile memory cell devices'19985,777,460'Voltage step-up circuit with output voltage regulation'19985,757,719'Page-mode memory device with multiple-level memory cells'19985,729,490'Parallel-dichotomic serial sensing method for sensing multiple-level non-volatile memory cells, and sensing circuit for actuating such method'19985,710,739'Reading circuit for memory cells'19985,701,265'Serial dichotomic method for sensing multiple-level non-volatile memory cells, and sensing circuit implementing such method'19975,694,363'Reading circuit for memory cell devices having a low supply voltage'19975,673,221'Circuit and method for reading a memory cell that can store multiple bits of data'19975,546,044'Voltage generator circuit providing potentials of opposite polarity'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2003Patents assigned to ST MICROELECTRONICS SRL (4)· patent assignee history
1996–1998Based in Pavia, IT· patent location history
1997–1999Patents assigned to SGS THOMSON MICROELECTRONICS (11)· patent assignee history
1997–2018Based in Torre d'Isola, IT· patent location history
2014–2016Patents assigned to MICRON TECHNOLOGY INC (2)· patent assignee history
2014Patents assigned to CALLIGARO CRISTIANO (1)· patent assignee history
2014Patents assigned to PASCUCCI LUIGI (1)· patent assignee history
2014Based in Sicily, IT· patent location history
2016Based in Torre Pellice, IT· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SGS THOMSON MICROELECTRONICS | 11 | 1997–1999 |
| ST MICROELECTRONICS SRL | 4 | 1996–2003 |
| MICRON TECHNOLOGY INC | 2 | 2014–2016 |
| CALLIGARO CRISTIANOself | 1 | 2014 |
| PASCUCCI LUIGI | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Torre d'Isola, IT | 13 | 1997–2018 |
| Pavia, IT | 3 | 1996–1998 |
| Torre Pellice, IT | 1 | 2016 |
| Sicily, IT | 1 | 2014 |