Inventor
Choong Bin Yim
Inventor
Seongnam-si, KR
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1077%
H01LSemiconductor devices12%
H10DInorganic electric semiconductor devices8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
PatentTitleYear
9,245,863'Semiconductor packaging apparatus formed from semiconductor package including first and second solder balls having different heights'20169,190,401'Stacked semiconductor packages'20158,952,513'Stack type semiconductor package and method of fabricating the same'20158,759,959'Stacked semiconductor packages'20148,530,280'Integrated circuit package system with contoured encapsulation and method for manufacturing thereof'20138,367,465'Integrated circuit package on package system'20138,187,921'Semiconductor package having ink-jet type dam and method of manufacturing the same'20128,049,322'Integrated circuit package-in-package system and method for making thereof'20117,999,368'Semiconductor package having ink-jet type dam and method of manufacturing the same'20117,985,623'Integrated circuit package system with contoured encapsulation'20117,884,460'Integrated circuit packaging system with carrier and method of manufacture thereof'20117,755,180'Integrated circuit package-in-package system'20107,679,169'Stacked integrated circuit leadframe package system'20107,501,697'Integrated circuit package system'20097,482,203'Stacked integrated circuit package-in-package system'20097,446,396'Stacked integrated circuit leadframe package system'20087,312,519'Stacked integrated circuit package-in-package system'20077,298,037'Stacked integrated circuit package-in-package system with recessed spacer'20077,288,835'Integrated circuit package-in-package system'20076,124,152'Method for fabricating cob type semiconductor package'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2007Based in Kyungki-do, KR· patent location history
2007–2013Patents assigned to STATS CHIPPAC LTD (13)· patent assignee history
2007–2013Based in Seongnam-si, KR· patent location history
2011–2016Patents assigned to SAMSUNG ELECTRONICS CO LTD (6)· patent assignee history
2011–2016Based in Cheonan-si, KR· patent location history
2012–2015Patents assigned to YIM CHOONG-BIN (3)· patent assignee history
2014–2015Patents assigned to CHOI DAE-YOUNG (2)· patent assignee history
2014–2015Patents assigned to KIM MI-YEON (2)· patent assignee history
2014Based in Chungcheongnam-do, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| STATS CHIPPAC LTD | 13 | 2007–2013 |
| SAMSUNG ELECTRONICS CO LTD | 6 | 2011–2016 |
| YIM CHOONG-BINself | 3 | 2012–2015 |
| CHOI DAE-YOUNG | 2 | 2014–2015 |
| KIM MI-YEON | 2 | 2014–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Seongnam-si, KR | 12 | 2007–2013 |
| Cheonan-si, KR | 5 | 2011–2016 |
| Kyungki-do, KR | 2 | 2000–2007 |
| Chungcheongnam-do, KR | 1 | 2014 |