Inventor

Eric J. Li

Inventor

Chandler, AZ, US

Overview

41→

Patents

2006–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 41 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%

H01LSemiconductor devices28%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%

B23KSoldering or unsoldering5%

B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form2%

C08LCompositions of macromolecular compounds2%

C09JAdhesives2%

H05KPrinted circuits2%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%

Y10TTechnical subjects covered by former us classification2%

PatentTitleYear

10,790,231Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrate2020 10,707,171Ultra small molded module integrated with die by module-on-wafer assembly2020 10,672,626Method and materials for warpage thermal and interconnect solutions2020 10,615,128Systems and methods for electromagnetic interference shielding2020 10,573,608Microelectronic devices designed with high frequency communication devices including compound semiconductor devices integrated on a die fabric on package2020 10,541,190Stacked die package with through-mold thermally conductive structures between a bottom die and a thermally conductive material2020 10,504,863Variable ball height on ball grid array packages by solder paste transfer2019 10,418,329Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrate2019 10,373,888Electronic package assembly with compact die placement2019 10,325,866Electronic device packages with conformal EMI shielding and related methods2019 10,256,205Variable ball height on ball grid array packages by solder paste transfer2019 10,256,198Warpage control for microelectronics packages2019 10,249,515Electronic device package2019 10,224,223Low temperature thin wafer backside vacuum process with backgrinding tape2019 10,224,290Electromagnetically shielded electronic devices and related systems and methods2019 10,163,810Electromagnetic interference shielding for system-in-package technology2018 10,121,722Architecture material and process to improve thermal performance of the embedded die package2018 9,991,211Semiconductor package having an EMI shielding layer2018 9,953,929Systems and methods for electromagnetic interference shielding2018 9,922,751'Helically insulated twinax cable systems and methods'2018 9,847,304Electronic device packages with conformal EMI shielding and related methods2017 9,842,818'Variable ball height on ball grid array packages by solder paste transfer'2017 9,741,692'Methods to form high density through-mold interconnections'2017 9,685,413'Semiconductor package having an EMI shielding layer'2017 9,659,899'Die warpage control for thin die assembly'2017 9,607,964'Method and materials for warpage thermal and interconnect solutions'2017 9,390,968'Low temperature thin wafer backside vacuum process with backgrinding tape'2016 9,263,329'Methods of connecting a first electronic package to a second electronic package'2016 9,123,732'Die warpage control for thin die assembly'2015 8,426,250'Laser-assisted chemical singulation of a wafer'2013 8,193,072'Semiconductor wafer coat layers and methods therefor'2012 7,897,486'Semiconductor wafer coat layers and methods therefor'2011 7,807,573'Laser assisted chemical vapor deposition for backside die marking and structures formed thereby'2010 7,767,563'Method of forming a silicide layer on a thinned silicon wafer, and related semiconducting structure'2010 7,611,966'Dual pulsed beam laser micromachining method'2009 7,553,386'Adhesive with differential optical properties and its application for substrate processing'2009 7,504,318'Nanopowder coating for scribing and structures formed thereby'2009 7,393,468'Adhesive with differential optical properties and its application for substrate processing'2008 7,279,362'Semiconductor wafer coat layers and methods therefor'2007 7,169,687'Laser micromachining method'2007 7,118,989'Method of forming vias on a wafer stack using laser ablation'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2020Patents assigned to INTEL CORP (41)· patent assignee history

2006–2020Based in Chandler, AZ, US· patent location history

2012–2017Patents assigned to LI ERIC J (5)· patent assignee history

2015–2017Patents assigned to DESHPANDE NITIN A (2)· patent assignee history

2015Patents assigned to ARANA LEONEL R (1)· patent assignee history

2017Patents assigned to KARHADE OMKAR G (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	41	2006–2020
LI ERIC Jself	5	2012–2017
DESHPANDE NITIN A	2	2015–2017
KARHADE OMKAR G	2	2017
ARANA LEONEL R	1	2015

Locations

Location	Patents	Span
Chandler, AZ, US	41	2006–2020