Inventor
Jeffrey J. Peterson
Inventor
Folsom, CA, US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
G11CStatic stores15%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems12%
G06FElectric digital data processing12%
B24BMachines, devices, or processes for grinding or polishing6%
G02BOptical elements, systems or apparatus6%
B04BCentrifuges3%
B82YSpecific uses or applications of nanostructures3%
C01BNon-metallic elements3%
C01GCompounds containing metals not covered by subclasses c01d or c01f3%
PatentTitleYear
8,617,707'Magic size nanoclusters and methods of preparing same'2013RE042551'Block locking apparatus for flash memory'20116,972,245'Method for co-fabricating strained and relaxed crystalline and poly-crystalline structures'20056,884,640'Method and apparatus for determining layer thickness and composition using ellipsometric evaluation'20056,818,137'Fabrication of electronic magnetic, optical, chemical, and mechanical systems using chemical endpoint detection'20046,800,212'Fabrication of optical components using Si, SiGe, SiGeC, and chemical endpoint detection'20046,651,032'Setting data retention thresholds in charge-based memory'20036,642,154'Method and apparatus for fabricating structures using chemically selective endpoint detection'20036,559,058'Method of fabricating three-dimensional components using endpoint detection'20036,545,299'Structures using chemo-mechanical polishing and chemically-selective endpoint detection'20036,465,357'Fabricating structures using chemo-mechanical polishing and chemically-selective endpoint detection'20026,073,243'Block locking and passcode scheme for flash memory'20006,035,401'Block locking apparatus for flash memory'20005,954,818'Method of programming, erasing, and reading block lock-bits and a master lock-bit in a flash memory device'19994,482,342'Blood processing system for cell washing'1984Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1984Based in Wellesley, MA, US· patent location history
1999–2003Patents assigned to INTEL CORP (4)· patent assignee history
1999–2011Based in Folsom, CA, US· patent location history
2002–2005Patents assigned to UNIV CALIFORNIA (8)· patent assignee history
2005Based in Austin, TX, US· patent location history
2011–2013Patents assigned to PETERSON JEFFREY J (2)· patent assignee history
2011Patents assigned to DALVI VISHRAM PRAKASH (1)· patent assignee history
2013Patents assigned to EVANS CHRISTOPHER (1)· patent assignee history
2013Based in Rochester, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| UNIV CALIFORNIA | 8 | 2002–2005 |
| INTEL CORP | 4 | 1999–2003 |
| PETERSON JEFFREY Jself | 2 | 2011–2013 |
| DALVI VISHRAM PRAKASH | 1 | 2011 |
| EVANS CHRISTOPHER | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Folsom, California, US | 11 | 1999–2011 |
| Austin, Texas, US | 2 | 2005 |
| Rochester, New York, US | 1 | 2013 |
| Wellesley, Massachusetts, US | 1 | 1984 |