Inventor
Teruaki Kanzaki
Inventor
Tokyo, JP
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing32%
H03KPulse technique21%
G11CStatic stores12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G05FSystems for regulating electric or magnetic variables6%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
H01LSemiconductor devices3%
H03MCoding3%
H04BTransmission3%
PatentTitleYear
10,361,683Semiconductor integrated circuit201910,020,799Semiconductor integrated circuit20189,627,298'Semiconductor device'20178,178,981'Semiconductor device'20128,067,961'Level conversion circuit for converting voltage amplitude of signal'20117,701,063'Semiconductor device'20107,656,201'Output buffer circuit'20107,652,505'Level conversion circuit for converting voltage amplitude of signal'20107,432,740'Level conversion circuit for converting voltage amplitude of signal'20086,996,704'Trace control circuit adapted for high-speed microcomputer operation'20066,839,869'Trace control circuit for tracing CPU operation in real time'20056,813,732'Trace circuit'20046,765,818'Semiconductor memory having memory cells and device for controlling data written in the semiconductor memory'20046,651,152'Microcomputer including download circuit controlling data download to plurality of memories'20036,633,973'Trace control circuit adapted for high-speed microcomputer operation'20036,586,973'Output buffer circuit'20036,463,551'Debug circuit and microcomputer incorporating debug circuit'20026,075,941'Microcomputer'20005,983,018'Debug interrupt-handling microcomputer'19995,901,283'Microcomputer'19995,654,926'Semiconductor memory device'19975,543,794'Successive approximation analog-to-digital converter using CMOS inverter with pull-up and/or pull-down switches'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2004Patents assigned to MITSUBISHI ELECTRIC CORP (10)· patent assignee history
1996Based in Itami, JP· patent location history
1997–2003Based in Hyogo, JP· patent location history
1999–2019Based in Tokyo, JP· patent location history
2000–2002Patents assigned to IBM (2)· patent assignee history
2004–2010Patents assigned to RENESAS TECH CORP (7)· patent assignee history
2011–2019Patents assigned to RENESAS ELECTRONICS CORP (5)· patent assignee history
2011–2012Patents assigned to KANZAKI TERUAKI (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 10 | 1996–2004 |
| RENESAS TECH CORP | 7 | 2004–2010 |
| RENESAS ELECTRONICS CORP | 5 | 2011–2019 |
| IBM | 2 | 2000–2002 |
| KANZAKI TERUAKIself | 2 | 2011–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 18 | 1999–2019 |
| Hyogo, JP | 3 | 1997–2003 |
| Itami, JP | 1 | 1996 |