Inventor

Sudarshan B. Cadambi

Inventor

Portland, OR, US

Overview

13→

Patents

1993–1999

Patent span

Physics

Primary field (CPC G)

Patents· 13 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing68%

H04LTransmission of digital information, e.g. telegraphic communication26%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%

PatentTitleYear

5,909,556'M&A for exchanging date, status and commands over an hierarchical serial bus assembly using communication packets'1999 5,881,252'Method and apparatus for automatically configuring circuit cards in a computer system'1999 5,768,542'Method and apparatus for automatically configuring circuit cards in a computer system'1998 5,754,869'Method and apparatus for managing power consumption of the CPU and on-board system devices of personal computers'1998 5,742,847'M&A for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guaranty latencies and bandwidths to the isochronous functions'1998 5,694,555'Method and apparatus for exchanging data, status, and commands over an hierarchical serial bus assembly using communication packets'1997 5,623,610'System for assigning geographical addresses in a hierarchical serial bus by enabling upstream port and selectively enabling disabled ports at power on/reset'1997 5,615,404'System having independently addressable bus interfaces coupled to serially connected multi-ported signal distributors generating and maintaining frame based polling schedule favoring isochronous peripherals'1997 5,579,530'Method and apparatus for dynamically allocating access time to a resource shared between a peripheral bus and a host bus by dynamically controlling the size of burst data transfers on the peripheral bus'1996 5,367,657'Method and apparatus for efficient read prefetching of instruction code data in computer memory subsystems'1994 5,282,272'Interrupt distribution scheme for a computer bus'1994 5,261,109'Distributed arbitration method and apparatus for a computer bus using arbitration groups'1993 5,191,649'Multiprocessor computer system with data bus and ordered and out-of-order split data transactions'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–1999Patents assigned to INTEL CORP (13)· patent assignee history

1993–1994Based in Beaverton, OR, US· patent location history

1994–1999Based in Portland, OR, US· patent location history

1999Patents assigned to MICROSOFT CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	13	1993–1999
MICROSOFT CORP	1	1999

Locations

Location	Patents	Span
Portland, OR, US	10	1994–1999
Beaverton, OR, US	3	1993–1994