Inventor

Ran Zamir

Inventor
Ramat Gan, IL

Overview

29→
Patents
2017–2021
Patent span
Physics
Primary field (CPC G)

Patents· 29 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing38%
H03MCoding32%
G11CStatic stores24%
G06NComputing arrangements based on specific computational models3%
H04LTransmission of digital information, e.g. telegraphic communication1%
H04WWireless communication networks1%
PatentTitleYear
11,133,059Non-volatile memory die with deep learning neural network202111,088,712Iterative decoder performance prediction using machine learning202111,068,342Redundancy data in integrated memory assembly202111,057,059Content aware bit flipping decoder202110,977,125Adaptive usage of irregular code schemas based on specific system level triggers and policies202110,979,072Punctured bit estimation and bit error rate estimation202110,892,784Memory device with enhanced error correction via data rearrangement, data partitioning, and content aware decoding202110,862,512Data driven ICAD graph generation202010,725,860Storage system and method for handling a burst of errors202010,715,178Generalized low-density parity-check codes202010,691,539Grown defect detection and mitigation using ECC in memory systems202010,553,285Single-port memory with opportunistic writes202010,432,232Multi-type parity bit generation for encoding and decoding201910,418,097Non-volatile storage system with read calibration201910,374,639Adaptive bit-flipping decoder based on dynamic error information201910,355,712Use of multiple codebooks for programming data in different memory areas of a storage device201910,236,909Bit-order modification for different memory areas of a storage device201910,229,751Storage system and method for bad block recycling201910,230,395Determining codebooks for different memory areas of a storage device201910,218,384ECC decoder with multiple decoding modes201910,158,380ECC and read adjustment based on dynamic memory error model estimation201810,116,333Decoder with parallel decoding paths201810,110,249Column-layered message-passing LDPC decoder201810,089,177Multi-stage decoder201810,075,190Adaptive scheduler for decoding201810,002,086Multi-channel memory operations based on bit error rates20189,839,028Carrier aggregation controller and method20179,785,502'Pipelined decoder with syndrome feedback path'20179,734,903'Disturb condition detection for a resistive random access memory'2017

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2017–2020Patents assigned to SANDISK TECHNOLOGIES LLC (14)· patent assignee history
2017Patents assigned to SANDISK TECHNOLOGIES INC (2)· patent assignee history
2017Patents assigned to BAR-OR AMIT (1)· patent assignee history
2017Patents assigned to DRORY GUY (1)· patent assignee history
2017–2021Based in Ramat Gan, IL· patent location history
2019–2021Patents assigned to WESTERN DIGITAL TECH INC (14)· patent assignee history
2021Based in San Jose, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SANDISK TECHNOLOGIES LLC142017–2020
WESTERN DIGITAL TECH INC142019–2021
SANDISK TECHNOLOGIES INC22017
BAR-OR AMIT12017
DRORY GUY12017
Locations
LocationPatentsSpan
Ramat Gan, IL272017–2021
San Jose, California, US22021