Inventor
RAFAEL RIOS
Inventor
US
Overview
Patents· 97 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices22%
H03KPulse technique18%
H01LSemiconductor devices13%
H10BElectronic memory devices10%
G11CStatic stores9%
G06FElectric digital data processing7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
H10NElectric solid-state devices not otherwise provided for5%
B82YSpecific uses or applications of nanostructures2%
PatentTitleYear
12,593,456Method of fabricating transistors and stacked non-planar capacitors for memory and logic applications202612,554,462Asynchronous full-adder with majority or minority gates to generate an enable or an acknowledgement202612,524,205Asynchronous full-adder with majority or minority gates to generate sum true output202612,524,204Ferroelectric or paraelectric based low power multiplier202612,517,701Sequential reset mechanism for a chain of majority or minority gates having non-linear polar material202612,481,481Asynchronous carry-ripple adder with majority or minority gates202512,451,888Ripple carry adder with ferroelectric or paraelectric wide-input minority or majority gates202512,445,134Diode connected non-linear input capacitors based majority gate202512,439,606Gate coupled non-linear polar material based capacitors for memory and logic202512,436,739Non-linear polar material based low power multiplier with transmission-gate based reset mechanism202512,411,657Asynchronous full-adder with majority or minority gates to generate carry-out true output202512,405,768Asynchronous full-adder with majority or minority gates to generate carry-out false output202512,379,898Asynchronous full-adder with majority or minority gates to generate sum false output202512,376,362Field effect transistors with a gated oxide semiconductor source/drain spacer202512,376,312Methods of fabricating planar capacitors on a shared plate electrode202512,374,377Ferroelectric or paraelectric wide-input minority or majority gate based low power adder202512,369,326Capacitor devices with shared electrode and methods of fabrication202512,363,967Integration methods to fabricate internal spacers for nanowire devices202512,349,365Drain coupled non-linear polar material based capacitors for memory and logic202512,334,918Stacked non-planar capacitors based multi-function linear threshold gate with input based adaptive threshold202512,336,184Methods of fabricating trench capacitors on a shared plate electrode202512,334,923Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material202512,328,878Integration of 2T-202512,324,163Planar capacitors with shared electrode and methods of fabrication202512,324,162Stacked capacitors with shared electrodes and methods of fabrication202512,322,743Multi-function threshold gate with input based adaptive threshold and with stacked non-planar paraelectric capacitors202512,316,319Multi-function linear threshold gate with input based adaptive threshold202512,308,838Exclusive-or logic gate with non-linear input capacitors202512,308,836Method of adjusting threshold of a linear capacitive-input circuit202512,294,370Area optimized ferroelectric or paraelectric based low power multiplier202512,289,894Method of fabricating transistors and stacked planar capacitors for memory and logic applications202512,289,104Ferroelectric or paraelectric based low power multiplier array202512,283,955Majority or minority based low power checkerboard carry save multiplier with inverted multiplier cells202512,262,541Trench capacitors with shared electrode202512,218,045Stacked planar capacitors based multi-function linear threshold gate with input based adaptive threshold202512,212,321Non-linear polar material based flip-flop202512,155,383Reset mechanism for an adder or a multiplier having paraelectric material202412,142,634Silicon and silicon germanium nanowire structures202412,126,339Apparatus with selectable majority gate and combinational logic gate outputs202412,125,916Nanowire structures having non-discrete source and drain regions202412,118,330Low power multiplier with non-linear polar material based reset mechanism with sequential reset202412,118,327Ripple carry adder with inverted ferroelectric or paraelectric based adders202412,107,579Method for conditioning majority or minority gate202412,015,402Asynchronous consensus circuit with stacked ferroelectric non-planar capacitors202412,009,820Asynchronous consensus circuit with majority gate based on non-linear capacitors202411,985,831Multi-function threshold gate with input based adaptive threshold and with stacked non-planar ferroelectric capacitors202411,979,148Asynchronous consensus circuit with stacked linear or paraelectric planar capacitors202411,967,954Majority or minority logic gate with non-linear input capacitors without reset202411,909,391Asynchronous completion tree circuit using multi-function threshold gate with input based adaptive threshold202411,901,891Asynchronous consensus circuit with stacked ferroelectric planar capacitors202411,888,479Non-linear polar material based low power multiplier with NOR and NAND gate based reset mechanism202411,869,939Integration methods to fabricate internal spacers for nanowire devices202411,863,184Asynchronous validity tree circuit using multi-function threshold gate with input based adaptive threshold202411,855,626Asynchronous consensus circuit with stacked linear or paraelectric non-planar capacitors202311,855,627Asynchronous consensus circuit using multi-function threshold gate with input based adaptive threshold202311,817,859Asynchronous circuit with multi-input threshold gate logic and 1-input threshold gate202311,777,504Non-linear polar material based latch202311,764,790Majority logic gate having paraelectric input capacitors coupled to a conditioning scheme202311,757,452OR-and-invert logic based on a mix of majority or minority logic gate with non-linear input capacitors and other logic gates202311,750,197AND-OR-invert logic based on a mix of majority OR minority logic gate with non-linear input capacitors and other logic gates202311,742,860Fabrication of a majority logic gate having non-linear input capacitors202311,721,690Method of adjusting threshold of a ferroelectric capacitive-input circuit202311,716,085Pull-up and pull-down networks controlled asynchronously by threshold gate logic202311,716,083Asynchronous circuit with threshold logic202311,716,084Pull-up and pull-down networks controlled asynchronously by majority gate or minority gate logic202311,716,086Asynchronous circuit with majority gate or minority gate logic and 1-input threshold gate202311,705,905Multi-function ferroelectric threshold gate with input based adaptive threshold202311,705,906Majority logic gate having ferroelectric input capacitors and a pulsing scheme coupled to a conditioning logic202311,699,699Multi-function threshold gate with adaptive threshold and stacked planar ferroelectric capacitors202311,688,733Method of adjusting threshold of a paraelectric capacitive-input circuit202311,664,370Multi-function paraelectric threshold gate with input based adaptive threshold202311,664,371Multi-function threshold gate with adaptive threshold and stacked planar paraelectric capacitors202311,658,664Asynchronous circuit with majority gate or minority gate logic202311,652,482Parallel pull-up and pull-down networks controlled asynchronously by threshold logic gate202311,652,487Parallel pull-up and pull-down networks controlled asynchronously by majority gate or minority gate logic202311,641,205Reset mechanism for a chain of majority or minority gates having paraelectric material202311,626,519Fabrication of non-planar IGZO devices for improved electrostatics202311,611,345NAND based sequential circuit with ferroelectric or paraelectric material202311,588,102Semiconductor material for resistive random access memory202311,552,197Nanowire structures having non-discrete source and drain regions202311,545,979Compare logic based sequential circuit with ferroelectric or paraelectric material202311,539,368Majority logic gate with input paraelectric capacitors202211,509,308Sequential circuit without feedback or memory element202211,482,990Vectored sequential circuit with ferroelectric or paraelectric material202211,456,372Multi-height finfet device by selective oxidation202211,418,197Majority logic gate having paraelectric input capacitors and a local conditioning mechanism202211,394,3872-input NAND gate with non-linear input capacitors202211,374,575Majority logic gate with non-linear input capacitors and conditioning logic202211,348,973Threshold switching selector based memory202211,303,280Ferroelectric or paraelectric based sequential circuit202211,302,777Integration methods to fabricate internal spacers for nanowire devices202211,290,112Majority logic gate based XOR logic gate with non-linear input capacitors202211,290,111Majority logic gate based and-or-invert logic gate with non-linear input capacitors202211,277,137Majority logic gate with non-linear input capacitors202211,189,700Fabrication of wrap-around and conducting metal oxide contacts for IGZO non-planar devices202111,145,739Field effect transistors with a gated oxide semiconductor source/drain spacer202111,139,400Non-planar semiconductor device having hybrid geometry-based active region2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to INTEL CORP (7)· patent assignee history
2021–2024Patents assigned to GOOGLE LLC (3)· patent assignee history
2021–2026Based in US· patent location history
2022–2026Patents assigned to KEPLER COMPUTING INC (83)· patent assignee history
2022–2025Patents assigned to SONY GROUP CORP (4)· patent assignee history
2023Patents assigned to KEPLER CORPATING INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| KEPLER COMPUTING INC | 83 | 2022–2026 |
| INTEL CORP | 7 | 2021–2025 |
| SONY GROUP CORP | 4 | 2022–2025 |
| GOOGLE LLC | 3 | 2021–2024 |
| KEPLER CORPATING INC | 1 | 2023 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 97 | 2021–2026 |