Inventor

Hsin-Hung Liao

Inventor
Taipei, TW

Overview

27→
Patents
2012–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 27 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices26%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
B23KSoldering or unsoldering9%
Y02PClimate change mitigation technologies in the production or processing of goods5%
B21DWorking or processing of sheet metal or metal tubes, rods or profiles without essentially removing material3%
Y10TTechnical subjects covered by former us classification3%
B05CApparatus for applying fluent materials to surfaces, in general2%
C23CCoating metallic material2%
A61MDevices for introducing media into, or onto, the body1%
PatentTitleYear
10,867,890Mutli-chip package with encapsulated conductor via202010,770,331Semiconductor wafer device and manufacturing method thereof202010,727,074Method and system for thinning wafer thereof202010,679,866Interconnect structure for semiconductor package and method of fabricating the interconnect structure202010,510,712Methods for controlling warpage in packaging201910,504,870Mechanisms for forming bonding structures201910,438,922Method and system for mounting components in semiconductor fabrication process201910,276,509Integrated fan-out package201910,269,582Package structure, fan-out package structure and method of the same201910,157,881Methods for controlling warpage in packaging201810,115,690Method of manufacturing micro pins and isolated conductive micro pin201810,056,285Semiconductor wafer device and manufacturing method thereof20189,984,960Integrated fan-out package and method of fabricating the same20189,870,929'Package structure, fan-out package structure and method of the same'20189,870,997'Integrated fan-out package and method of fabricating the same'20189,812,346'Semiconductor wafer device and manufacturing method thereof'20179,768,142'Mechanisms for forming bonding structures'20179,498,851'Methods for forming apparatus for stud bump formation'20169,484,226'Methods for controlling warpage in packaging'20169,236,351'Semiconductor wafer device'20169,129,899'Method and system for thinning wafer thereof'20159,093,337'Methods for controlling warpage in packaging'20159,085,049'Method and system for manufacturing semiconductor device'20158,936,730'Methods for forming apparatus for stud bump formation'20158,540,136'Methods for stud bump formation and apparatus for performing the same'20138,460,564'Drug delivery chip and fabricating method thereof'20138,111,439'Optical switch and optical switch device having the same'2012

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2012–2013Patents assigned to LIAO HSIN-HUNG (3)· patent assignee history
2012–2013Patents assigned to UNIV NAT TAIWAN (2)· patent assignee history
2012–2013Patents assigned to YANG YAO-JOE (2)· patent assignee history
2012–2020Based in Taipei, TW· patent location history
2013–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (5)· patent assignee history
2013–2017Based in Hsinchu, TW· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (20)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD202015–2020
TAIWAN SEMICONDUCTOR MFG52013–2016
LIAO HSIN-HUNGself32012–2013
UNIV NAT TAIWAN22012–2013
YANG YAO-JOE22012–2013
Locations
LocationPatentsSpan
Taipei, TW222012–2020
Hsinchu, TW52013–2017