Inventor
Kaladhar Radhakrishnan
Inventor
Chandler, AZ, US
Overview
Patents· 30 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1035%
H05KPrinted circuits16%
H01LSemiconductor devices12%
H01GCapacitors10%
H01FMagnets6%
H10DInorganic electric semiconductor devices6%
H02JElectric power networks4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
G06FElectric digital data processing2%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%
PatentTitleYear
11,081,434Package substrates with magnetic build-up layers202110,950,555Ultra-low profile package shielding technique using magnetic and conductive layers for integrated switching voltage regulator202110,748,842Package substrates with magnetic build-up layers202010,741,536Magnetic small footprint inductor array module for on-package voltage regulator202010,503,227Apparatus and method to reduce power losses in an integrated voltage regulator201910,453,705Multi-voltage apparatus for electronics package including magnetic inductor and capacitor and manufacturing thereof201910,340,260Magnetic small footprint inductor array module for on-package voltage regulator201910,056,182Surface-mount inductor structures for forming one or more inductors with substrate traces20189,911,723'Magnetic small footprint inductor array module for on-package voltage regulator'20189,753,510'Apparatus and method to reduce power losses in an integrated voltage regulator'20179,526,175'Suspended inductor microelectronic structures'20169,230,944'Techniques and configurations associated with a capductor assembly'20168,373,074'Integrated inductor'20138,264,846'Ceramic package substrate with recessed device'20127,692,284'Package using array capacitor core'20107,687,905'Integrated circuit packages, systems, and methods'20107,675,160'Individual sub-assembly containing a ceramic interposer, silicon voltage regulator, and array capacitor'20107,667,320'Integrated circuit package with improved power signal connection'20107,636,242'Integrated inductor'20097,495,336'Array capacitors for broadband decoupling applications'20097,463,492'Array capacitors with voids to enable a full-grid socket'20087,365,428'Array capacitor with resistive structure'20087,361,969'Controlled equivalent series resistance capacitor'20087,355,836'Array capacitor for decoupling multiple voltage rails'20087,348,214'Integrated circuit package with improved power signal connection'20087,339,263'Integrated circuit packages, systems, and methods'20087,265,995'Array capacitors with voids to enable a full-grid socket'20077,183,644'Integrated circuit package with improved power signal connection'20077,173,804'Array capacitor with IC contacts and applications'20076,943,294'Integrating passive components on spacer in stacked dies'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2021Patents assigned to INTEL CORP (30)· patent assignee history
2005–2021Based in Chandler, AZ, US· patent location history
2009–2021Based in Gilbert, AZ, US· patent location history
2012–2016Patents assigned to RADHAKRISHNAN KALADHAR (3)· patent assignee history
2012Patents assigned to BACH DAVID (1)· patent assignee history
2012Patents assigned to BINDER LARRY (1)· patent assignee history
2013Patents assigned to BURTON EDWARD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 30 | 2005–2021 |
| RADHAKRISHNAN KALADHARself | 3 | 2012–2016 |
| BACH DAVID | 1 | 2012 |
| BINDER LARRY | 1 | 2012 |
| BURTON EDWARD | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Chandler, AZ, US | 21 | 2005–2021 |
| Gilbert, AZ, US | 9 | 2009–2021 |