Inventor

Mototsugu Hamada

Inventor
Yokohama, JP

Overview

26→
Patents
2000–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 26 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary
H03KPulse technique45%
G11CStatic stores17%
H10DInorganic electric semiconductor devices10%
G05FSystems for regulating electric or magnetic variables7%
H10BElectronic memory devices7%
G06FElectric digital data processing3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%
H04BTransmission3%
H04NPictorial communication, e.g. television3%
PatentTitleYear
11,108,931Information processing apparatus for retransferring fax documents that were unsuccessfully transmitted20218,587,384'Semiconductor integrated circuit device and oscillation frequency calibration method'20138,134,404'Semiconductor device that degrades leak current of a transistor'20128,067,962'Semiconductor integrated circuit device'20117,808,017'Semiconductor integrated circuit'20107,733,145'Nonvolatile latch circuit and nonvolatile flip-flop circuit'20107,679,106'Semiconductor integrated circuit'20107,675,355'Semiconductor device that degrades leak current of a transistor'20107,606,096'Semiconductor integrated circuit device'20097,602,211'Semiconductor integrated circuit device'20097,586,364'Power supply voltage controlling circuit and semiconductor integrated circuit'20097,551,019'Semiconductor integrated circuit and source voltage/substrate bias control circuit'20097,479,806'Semiconductor integrated circuit device'20097,456,669'Semiconductor integrated circuit device'20087,417,489'Semiconductor integrated circuit having controller controlling the change rate of power voltage'20087,397,271'Semiconductor integrated circuit device'20087,236,035'Semiconductor device adapted to minimize clock skew'20076,859,648'Semiconductor integrated circuit device'20056,801,449'Semiconductor memory device'20046,714,439'Semiconductor memory device'20046,630,853'Semiconductor integrated circuit including conditional clocking flip-flop circuit'20036,476,639'Semiconductor integrated circuit device capable of producing output thereof without being influenced by other input'20026,373,291'Pass transistor logic circuit for reducing power consumption'20026,331,796'Semiconductor integrated circuit device having transistor logic and load circuits'20016,204,707'Flip-flop circuit with clock signal control function and clock control circuit'20016,081,153'Latch circuit and flip-flop circuit having voltage level converting function'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2013Patents assigned to TOSHIBA KK (25)· patent assignee history
2000–2013Based in Yokohama, JP· patent location history
2001Based in Kohoku-ku, JP· patent location history
2003–2021Based in Kanagawa, JP· patent location history
2009Based in Palo Alto, CA, US· patent location history
2011–2013Patents assigned to HAMADA MOTOTSUGU (3)· patent assignee history
2012Patents assigned to ASHIDA MITSUYUKI (1)· patent assignee history
2021Patents assigned to FUJI XEROX CO LTD (1)· patent assignee history
2021Patents assigned to FUJIFILM BUSINESS INNOVATION CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TOSHIBA KK252000–2013
HAMADA MOTOTSUGUself32011–2013
ASHIDA MITSUYUKI12012
FUJI XEROX CO LTD12021
FUJIFILM BUSINESS INNOVATION CORP12021
Locations
LocationPatentsSpan
Yokohama, JP202000–2013
Kanagawa, JP42003–2021
Palo Alto, California, US12009
Kohoku-ku, JP12001