Inventor

Scott C. Lewis

Inventor

Essex Junction, VT, US

Overview

52→

Patents

1977–2021

Patent span

Physics

Primary field (CPC G)

Patents· 52 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores18%

G01NInvestigating or analysing materials by determining their chemical or physical properties12%

B01LChemical or physical laboratory apparatus for general use11%

Y10TTechnical subjects covered by former us classification11%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests9%

Y02ATechnologies for adaptation to climate change8%

H03KPulse technique5%

A46BBrushes3%

E01HStreet cleaning3%

G06NComputing arrangements based on specific computational models3%

PatentTitleYear

11,029,027Dilution/effusion hole pattern for thick combustor panels2021 10,810,489Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models2020 10,762,959Writing multiple levels in a phase change memory2020 10,692,576Writing multiple levels in a phase change memory2020 10,572,799Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models2020 10,566,057Writing multiple levels in a phase change memory2020 10,535,403Writing multiple levels in a phase change memory2020 10,424,375Writing multiple levels in a phase change memory2019 10,295,220Snow removal assembly, apparatus and method for air handling units2019 10,169,701Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models2019 10,037,802Phase change memory with an incrementally ramped write-reference voltage and an incrementally ramped read-reference voltage2018 9,911,492'Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period'2018 9,779,813'Phase change memory array architecture achieving high write/read speed'2017 9,779,810'Adjustable writing circuit'2017 9,502,107'Writing multiple levels in a phase change memory'2016 9,299,431'Writing multiple levels in a phase change memory using a write/read reference voltage ramping up over a write/read period'2016 8,717,802'Reconfigurable multi-level sensing scheme for semiconductor memories'2014 D0663162'Grill insert'2012 7,182,912'Fluid handling apparatus for an automated analyzer'2007 6,774,759'Combined fuse holder and current monitor'2004 6,759,598'Power distribution backplane'2004 6,618,897'Broom and blower control method and apparatus'2003 6,555,062'Reagent container for an automated analyzer'2003 6,498,037'Method of handling reagents in a random access protocol'2002 6,436,349'Fluid handling apparatus for an automated analyzer'2002 6,367,175'Low turbulence air blast system'2002 6,359,770'Power distribution circuit board with bullet connectors'2002 6,358,099'Telecommunications power distribution panel'2002 6,351,898'Height adjustment system'2002 6,074,615'Reagent container for an automated analyzer'2000 6,063,340'Reagent container for automated analyzer'2000 6,014,046'Off chip driver (OCD) with variable drive capability for noise control'2000 5,995,440'Off-chip driver and receiver circuits for multiple voltage level DRAMs'1999 5,814,980'Wide range voltage regulator'1998 5,741,708'Automated analyzer having magnetic isolation device and method using the same'1998 5,679,948'Constant luminescence source module for an automated analyzer'1997 5,653,940'Luminometer for an automated analyzer'1997 D0382061'Fluid bottle'1997 5,637,275'Automated analyzer with reagent agitating device'1997 5,582,796'Feed and orientation mechanism in automated analyzer'1996 D0375565'Fluid reservoir'1996 5,447,687'Luminometer'1995 D0341779'Evaporation cover'1993 D0330429'Reagent bottle for a clinical laboratory analyzer'1992 D0330428'Cuvette for a clinical laboratory analyzer'1992 5,134,616'Dynamic RAM with on-chip ECC and optimized bit and word redundancy'1992 5,015,880'CMOS driver circuit'1991 4,999,815'Low power addressing systems'1991 4,719,600'Sense circuit for multilevel storage system'1988 4,433,252'Input signal responsive pulse generating and biasing circuit for integrated circuits'1984 4,038,567'Memory input signal buffer circuit'1977 4,010,453'Stored charge differential sense amplifier'1977

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1977–2020Patents assigned to IBM (24)· patent assignee history

1977–2020Based in Essex Junction, VT, US· patent location history

1992–2012Patents assigned to LEWIS SCOTT (4)· patent assignee history

1992–2007Based in Amherst, OH, US· patent location history

1997–2000Patents assigned to CHIRON DIAGNOSTICS CORP (6)· patent assignee history

2000–2003Patents assigned to BAYER AG (4)· patent assignee history

2002–2004Patents assigned to MARCONI COMM INC (3)· patent assignee history

2002–2003Based in Lakewood, CO, US· patent location history

2017–2020Based in Eastham, MA, US· patent location history

2021Based in Vernon, CT, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	24	1977–2020
CHIRON DIAGNOSTICS CORP	6	1997–2000
BAYER AG	4	2000–2003
LEWIS SCOTTself	4	1992–2012
MARCONI COMM INC	3	2002–2004

Locations

Location	Patents	Span
Essex Junction, VT, US	21	1977–2020
Amherst, OH, US	21	1992–2007
Eastham, Massachusetts, US	4	2017–2020
Lakewood, CO, US	3	2002–2003
Vernon, CT, US	1	2021