Inventor
Saptharishi Sriram
Inventor
Cary, NC, US
Overview
Patents· 38 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices49%
H01LSemiconductor devices20%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H03FAmplifiers4%
B22FWorking metallic powder1%
B60KArrangement or mounting of propulsion units or of transmissions in vehicles1%
C22CAlloys1%
F16HGearing1%
H01JElectric discharge tubes or discharge lamps1%
PatentTitleYear
10,861,963Monolithic microwave integrated circuits having both enhancement-mode and depletion mode transistors202010,840,334Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same202010,753,473Article having plurality of functionally graded regions and a method of manufacturing thereof202010,615,273Semiconductor devices having a plurality of unit cell transistors that have smoothed turn-on behavior and improved linearity202010,516,043Monolithic microwave integrated circuits having both enhancement-mode and depletion mode transistors201910,354,879Depletion mode semiconductor devices including current dependent resistance201910,192,980Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same20199,847,411Recessed field plate transistor structures20179,755,059'Cascode structures with GaN cap layers'20179,679,981'Cascode structures for GaN HEMTs'20179,640,627'Schottky contact'20179,608,078'Semiconductor device with improved field plate'20179,356,129'Tunnel junction field effect transistors having self-aligned source and gate electrodes and methods of forming the same'20169,306,009'Mix doping of a semi-insulating Group III nitride'20169,202,903'Tunnel junction field effect transistors having self-aligned source and gate electrodes and methods of forming the same'20158,421,122'High power gallium nitride field effect transistor switches'20138,304,783'Schottky diodes including polysilicon having low barrier heights and methods of fabricating the same'20128,203,185'Semiconductor devices having varying electrode widths to provide non-uniform gate pitches and related methods'20128,138,583'Diode having reduced on-resistance and associated method of manufacture'20127,943,972'Methods of fabricating transistors having buried P-type layers coupled to the gate'20117,858,460'Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides'20107,737,476'Metal-semiconductor field effect transistors (MESFETs) having self-aligned structures'20107,646,043'Transistors having buried p-type layers coupled to the gate'20107,525,122'Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides'20097,402,844'Metal semiconductor field effect transistors (MESFETS) having channels of varying thicknesses and related methods'20087,348,612'Metal-semiconductor field effect transistors (MESFETs) having drains coupled to the substrate and methods of fabricating the same'20087,326,962'Transistors having buried N-type and P-type regions beneath the source region and methods of fabricating the same'20087,297,580'Methods of fabricating transistors having buried p-type layers beneath the source region'20077,265,399'Asymetric layout structures for transistors and methods of fabricating the same'20076,956,239'Transistors having buried p-type layers beneath the source region'20056,906,350'Delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure'20056,902,964'Methods of fabricating delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure'20055,925,895'Silicon carbide power MESFET with surface effect supressive layer'19995,825,076'Integrated circuit non-etch technique for forming vias in a semiconductor wafer and a semiconductor wafer having vias formed therein using non-etch technique'19985,821,576'Silicon carbide power field effect transistor'19985,612,547'Silicon carbide static induction transistor'19975,386,115'Solid state micro-machined mass spectrograph universal gas detection sensor'19955,043,777'Power FETS with improved high voltage performance'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1991–1999Based in Monroeville, PA, US· patent location history
1997–1999Patents assigned to NORTHROP GRUMMAN CORP (4)· patent assignee history
2005–2020Patents assigned to CREE INC (31)· patent assignee history
2005–2020Based in Cary, NC, US· patent location history
2012–2017Patents assigned to SRIRAM SAPTHARISHI (5)· patent assignee history
2012–2017Patents assigned to HAGLEITNER HELMUT (2)· patent assignee history
2012–2013Patents assigned to SMITH JR THOMAS J (2)· patent assignee history
2020Based in Tamil Nadu, IN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CREE INC | 31 | 2005–2020 |
| SRIRAM SAPTHARISHIself | 5 | 2012–2017 |
| NORTHROP GRUMMAN CORP | 4 | 1997–1999 |
| HAGLEITNER HELMUT | 2 | 2012–2017 |
| SMITH JR THOMAS J | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cary, NC, US | 31 | 2005–2020 |
| Monroeville, Pennsylvania, US | 6 | 1991–1999 |
| Tamil Nadu, IN | 1 | 2020 |