Inventor
Jau-Jey Wang
Inventor
Hsinchu, TW
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices50%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1030%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
PatentTitleYear
7,696,578'Selective CESL structure for CMOS application'20106,171,913'Process for manufacturing a single asymmetric pocket implant'20015,801,090'Method of protecting an alignment mark in a semiconductor manufacturing process with CMP'19985,705,441'Ion implant silicon nitride mask for a silicide free contact region in a self aligned silicide process'19985,547,881'Method of forming a resistor for ESD protection in a self aligned silicide process'19965,508,212'Salicide process for a MOS semiconductor device using nitrogen implant of titanium'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2010Patents assigned to TAIWAN SEMICONDUCTOR MFG (6)· patent assignee history
1996–2010Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 6 | 1996–2010 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 6 | 1996–2010 |