Inventor

Shizuo Cho

Inventor

Miyazaki, JP

Overview

1991–2003

Patent span

Physics

Primary field (CPC G)

Patents· 13 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores53%

H03KPulse technique20%

G05FSystems for regulating electric or magnetic variables13%

H03FAmplifiers7%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests7%

PatentTitleYear

6,593,795'Level adjustment circuit and data output circuit thereof'2003 6,459,322'Level adjustment circuit and data output circuit thereof'2002 6,337,815'Semiconductor memory device having redundant circuit'2002 5,510,750'Bias circuit for providing a stable output current'1996 5,369,320'Bootstrapped high-speed output buffer'1994 5,357,468'Semiconductor memory device'1994 5,337,278'Low-power decoder for selecting redundant memory cells'1994 5,161,121'Random access memory including word line clamping circuits'1992 5,148,399'Sense amplifier circuitry selectively separable from bit lines for dynamic random access memory'1992 5,140,556'Semiconductor memory circuit having dummy cells connected to twisted bit lines'1992 5,103,158'Reference voltage generating circuit'1992 5,058,073'CMOS RAM having a complementary channel sense amplifier'1991 5,001,669'Semiconductor memory circuit having dummy cells connected to twisted bit lines'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991–2003Patents assigned to OKI ELECTRIC IND CO LTD (13)· patent assignee history

1991–1992Based in Tokyo, JP· patent location history

1992–2003Based in Miyazaki, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
OKI ELECTRIC IND CO LTD	13	1991–2003

Locations

Location	Patents	Span
Miyazaki, JP	8	1992–2003
Tokyo, JP	5	1991–1992