Inventor
Seung Wook Yoon
Inventor
Singapore, SG
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1035%
H01LSemiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
A61KPreparations for medical, dental or toiletry purposes2%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry2%
C07CAcyclic or carbocyclic compounds2%
H10DInorganic electric semiconductor devices2%
Y02PClimate change mitigation technologies in the production or processing of goods2%
PatentTitleYear
11,117,846Catalyst system for olefin oligomerization and method for preparing olefin oligomer by using same202110,622,293Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLB-MLP)202010,515,828Method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP201910,475,779Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP201910,446,459Semiconductor device and method of forming encapsulated wafer level chip scale package (EWLCSP)201910,213,396Patch to enhance locally fat metabolism, using thermoplastic elastomer gel composition including capsaicin201910,181,423Semiconductor device and method of using a standardized carrier in semiconductor packaging20199,768,155'Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP'20179,704,769'Semiconductor device and method of forming encapsulated wafer level chip scale package (EWLCSP)'20179,640,603'Semiconductor device and method of forming inductor over insulating material filled trench in substrate'20179,620,413'Semiconductor device and method of using a standardized carrier in semiconductor packaging'20179,496,195'Semiconductor device and method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP'20169,293,401'Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP)'20169,224,693'Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier'20159,224,647'Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer'20159,064,936'Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP'20158,993,377'Semiconductor device and method of bonding different size semiconductor die at the wafer level'20157,160,756'Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra-low k devices'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007Patents assigned to AGENCY FOR SCIENCE TECHOLOGY A (1)· patent assignee history
2007–2020Based in Singapore, SG· patent location history
2015–2017Patents assigned to STATS CHIPPAC LTD (10)· patent assignee history
2015Patents assigned to KOO JUN MO (2)· patent assignee history
2015Patents assigned to YOON SEUNG WOOK (2)· patent assignee history
2016–2019Patents assigned to STATS CHIPPAC PTE LTD (9)· patent assignee history
2019Based in Seoul, KR· patent location history
2021Based in Daejeon, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| STATS CHIPPAC LTD | 10 | 2015–2017 |
| STATS CHIPPAC PTE LTD | 9 | 2016–2019 |
| KOO JUN MO | 2 | 2015 |
| YOON SEUNG WOOKself | 2 | 2015 |
| AGENCY FOR SCIENCE TECHOLOGY A | 1 | 2007 |
Locations
| Location | Patents | Span |
|---|---|---|
| Singapore, SG | 16 | 2007–2020 |
| Daejeon, KR | 1 | 2021 |
| Seoul, KR | 1 | 2019 |