Inventor
Vinod Bussa
Inventor
Hyderabad, IN
Overview
Patents· 10 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
10,261,917Identifying stale entries in address translation cache201910,169,181Efficient validation of transactional memory in a computer processor20199,892,060'Identifying stale entries in address translation cache'20189,720,845'Identifying stale entries in address translation cache'20179,697,138'Identifying stale entries in address translation cache'20179,594,680'Identifying stale entries in address translation cache'20178,019,566'System and method for efficiently testing cache congruence classes during processor design verification and validation'20117,966,521'Light weight and high throughput test case generation methodology for testing cache/TLB intervention and diagnostics'20117,669,083'System and method for re-shuffling test case instruction orders for processor design verification and validation'20107,647,539'System and method of testing using test pattern re-execution in varying timing scenarios for processor design verification and validation'2010Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2019Patents assigned to IBM (10)· patent assignee history
2010–2011Based in Hi-tech city, IN· patent location history
2017–2019Based in Hyderabad, IN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 10 | 2010–2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hyderabad, IN | 6 | 2017–2019 |
| Hi-tech city, IN | 4 | 2010–2011 |