Inventor

Chia-Cheng Chen

Inventor
Taichung, TW

Overview

65→
Patents
2007–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 65 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
H10DInorganic electric semiconductor devices13%
H05KPrinted circuits9%
G11CStatic stores7%
Y10TTechnical subjects covered by former us classification4%
LOC061%
B82YSpecific uses or applications of nanostructures1%
E05FDevices for moving wings into open or closed position1%
PatentTitleYear
10,868,178Field effect transistor contact with reduced contact resistance using implantation process202010,861,957FinFET devices and methods of forming202010,756,199Fin field effect transistors having conformal oxide layers and methods of forming same202010,727,226Semiconductor structure and method for forming the same202010,672,871High surface dopant concentration formation processes and structures formed thereby202010,658,508Structure and formation method of semiconductor device with low resistance contact202010,629,572Electronic package and method for fabricating the same202010,510,838High surface dopant concentration formation processes and structures formed thereby201910,510,891Field effect transistor contact with reduced contact resistance using implantation process201910,431,535Electronic package and method for fabricating the same201910,347,720Doping for semiconductor device with conductive feature201910,347,762Field effect transistor contact with reduced contact resistance using implantation process201910,326,003FinFET device and methods of forming201910,269,921Fin field effect transistors having conformal oxide layers and methods of forming same201910,164,066FinFET devices and methods of forming201810,141,266Method of fabricating semiconductor package structure201810,128,368Double gate trench power transistor and manufacturing method thereof201810,068,842Single-layer wiring package substrate, single-layer wiring package structure having the package substrate, and method of fabricating the same201810,043,757Semiconductor package structure and method of fabricating the same201810,002,825Method of fabricating package structure with an embedded electronic component20189,991,197Fabrication method of semiconductor package20189,922,827'Method of forming a semiconductor structure'20189,899,249'Fabrication method of coreless packaging substrate'20189,893,160'Methods of forming gate dielectric material'20189,735,080'Single-layer wiring package substrate, single-layer wiring package structure having the package substrate, and method of fabricating the same'20179,716,060'Package structure with an embedded electronic component and method of fabricating the package structure'20179,673,140'Package structure having a laminated release layer and method for fabricating the same'20179,666,302'System and method for memory scan design-for-test'20179,564,346'Package carrier, semiconductor package, and process for fabricating same'20179,515,188'Fin field effect transistors having conformal oxide layers and methods of forming same'20169,510,463'Coreless packaging substrate and fabrication method thereof'20169,455,025'Static random access memory and method of controlling the same'20169,281,311'Memory cell array including a write-assist circuit and embedded coupling capacitor and method of forming same'20169,230,622'Simultaneous two/dual port access on 6T SRAM'20169,196,597'Semiconductor package with single sided substrate design and manufacturing methods thereof'20159,183,907'Vccmin for a dual port synchronous random access memory (DPSRAM) cell utilized as a single port synchronous random access memory (SPSRAM) cell'20159,165,900'Semiconductor package and process for fabricating same'20159,082,723'Semiconductor package and fabrication method thereof'20159,064,604'Timing logic for memory array'20159,040,393'Method of forming semiconductor structure'20158,884,424'Semiconductor package with single sided substrate design and manufacturing methods thereof'20148,786,062'Semiconductor package and process for fabricating same'20148,659,936'Low power static random access memory'20148,603,924'Methods of forming gate dielectric material'20138,569,894'Semiconductor package with single sided substrate design and manufacturing methods thereof'20138,556,220'Locking device for a display mounting assembly'20138,399,776'Substrate having single patterned metal layer, and package applied with the substrate , and methods of manufacturing of the substrate and package'20138,367,473'Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereof'20138,345,504'Data-aware dynamic supply random access memory'20138,320,164'Static random access memory with data controlled power supply'20128,300,420'Circuit substrate for mounting electronic component and circuit substrate assembly having same'20128,288,869'Semiconductor package with substrate having single metal layer and manufacturing methods thereof'2012D0666029'Supporting frame of a table'20128,228,752'Memory circuit and method for controlling memory circuit'20128,213,257'Variation-tolerant word-line under-drive scheme for random access memory'2012D0651826'Stand'20128,088,294'Method for manufacturing printed circuit boards'20128,067,696'Printed circuit board and method for manufacturing same'20118,033,858'Lamp holder with a fixing element fixed to a contact plate on one side of an insulating base and to a wiring element on other side of the base'20118,001,684'Method for manufacturing flexible printed circuit boards'20117,989,048'Flexible base for manufacturing flexible printed circuit boards'20117,799,603'Method for mounting electronic component on printed circuit board'20107,743,466'Labor-saving pivotal shaft structure'20107,613,485'Sliding module and its axle structure'20097,184,752'Wireless identification security activation device'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2015Patents assigned to CHEN CHIA-CHENG (18)· patent assignee history
2011–2018Based in Taoyuan, TW· patent location history
2012–2017Patents assigned to ADVANCED SEMICONDUCTOR ENG (9)· patent assignee history
2012–2014Patents assigned to FARADAY TECH CORP (5)· patent assignee history
2012–2020Based in Taichung, TW· patent location history
2012–2020Based in Hsinchu, TW· patent location history
2012–2017Based in Zhongli City, TW· patent location history
2015–2020Patents assigned to SILICONWARE PRECISION INDUSTRIES CO LTD (13)· patent assignee history
2015–2017Based in Toufen Township, TW· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (19)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD192016–2020
CHEN CHIA-CHENGself182011–2015
SILICONWARE PRECISION INDUSTRIES CO LTD132015–2020
ADVANCED SEMICONDUCTOR ENG92012–2017
FARADAY TECH CORP52012–2014
Locations
LocationPatentsSpan
Taichung, TW222012–2020
Hsinchu, TW192012–2020
Taoyuan, TW62011–2018
Zhongli City, TW62012–2017
Toufen Township, TW42015–2017