Inventor

Valery M. Dubin

Inventor

Portland, OR, US

Overview

1997–2019

Patent span

Electricity

Primary field (CPC H)

Patents· 113 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1026%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%

B82YSpecific uses or applications of nanostructures9%

C25DProcesses for the electrolytic or electrophoretic production of coatings7%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests7%

Y10TTechnical subjects covered by former us classification7%

C23CCoating metallic material6%

H10DInorganic electric semiconductor devices3%

B01JChemical or physical processes, e.g. catalysis or colloid chemistry2%

H01LSemiconductor devices2%

PatentTitleYear

10,249,588Designs and methods for conductive bumps2019 10,035,147Wafer with gel-based biochips for electrochemical synthesis and electrical detection of polymers2018 9,543,261'Designs and methods for conductive bumps'2017 9,508,675'Microelectronic package having direct contact heat spreader and method of manufacturing same'2016 9,391,054'Method of making the light source structure in flexible substrate'2016 9,105,628'Through substrate via (TSuV) structures and method of making the same'2015 9,085,461'Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis'2015 8,940,143'Gel-based bio chip for electrochemical synthesis and electrical detection of polymers'2015 8,933,473'Method, apparatus and system for providing light source structures on a flexible substrate'2015 8,911,609'Methods for electroplating copper'2014 8,580,679'Designs and methods for conductive bumps'2013 8,541,876'Microelectronic package having direct contact heat spreader and method of manufacturing same'2013 8,319,287'Tunable gate electrode work function material for transistor applications'2012 8,278,121'Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis'2012 8,227,335'Forming a copper diffusion barrier'2012 8,053,774'Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis'2011 7,964,174'Nanotube growth and device formation'2011 7,905,994'Substrate holder and electroplating system'2011 7,847,394'Packaging of integrated circuits with carbon nanotube arrays to enhance heat dissipation through a thermal interface'2010 7,755,082'Forming self-aligned nano-electrodes'2010 7,709,873'Polymer memory with adhesion layer containing an immobilized metal'2010 7,704,791'Packaging of integrated circuits with carbon nano-tube arrays to enhance heat dissipation through a thermal interface'2010 7,682,891'Tunable gate electrode work function material for transistor applications'2010 7,635,503'Composite metal films and carbon nanotube fabrication'2009 7,633,080'Method to assemble structures from nano-materials'2009 7,629,252'Conformal electroless deposition of barrier layer materials'2009 7,629,268'Method for an improved air gap interconnect structure'2009 7,625,817'Method of fabricating a carbon nanotube interconnect structures'2009 7,597,763'Electroless plating systems and methods'2009 7,586,196'Apparatus for an improved air gap interconnect structure'2009 7,550,385'Amine-free deposition of metal-nitride films'2009 7,525,196'Protection of seedlayer for electroplating'2009 7,476,967'Composite carbon nanotube thermal interface device'2009 7,476,974'Method to fabricate interconnect structures'2009 7,470,620'Microcircuit fabrication and interconnection'2008 7,442,634'Method for constructing contact formations'2008 7,438,794'Method of copper electroplating to improve gapfill'2008 7,416,980'Forming a barrier layer in interconnect joints and structures formed thereby'2008 7,371,311'Modified electroplating solution components in a low-acid electrolyte solution'2008 7,372,165'Method for making a semiconductor device having increased conductive material reliability'2008 7,365,011'Catalytic nucleation monolayer for metal seed layers'2008 7,348,675'Microcircuit fabrication and interconnection'2008 7,338,585'Electroplating chemistries and methods of forming interconnections'2008 7,316,061'Packaging of integrated circuits with carbon nano-tube arrays to enhance heat dissipation through a thermal interface'2008 7,314,543'Tin deposition'2008 7,312,155'Forming self-aligned nano-electrodes'2007 7,304,388'Method and apparatus for an improved air gap interconnect structure'2007 7,300,860'Integrated circuit with metal layer having carbon nanotubes and methods of making same'2007 7,285,494'Multiple stage electroless deposition of a metal layer'2007 7,279,720'Large bumps for optical flip chips'2007 7,279,423'Forming a copper diffusion barrier'2007 7,279,231'Electroless plating structure'2007 7,276,801'Designs and methods for conductive bumps'2007 7,262,504'Multiple stage electroless deposition of a metal layer'2007 7,250,366'Carbon nanotubes with controlled diameter, length, and metallic contacts'2007 7,229,922'Method for making a semiconductor device having increased conductive material reliability'2007 7,223,695'Methods to deposit metal alloy barrier layers'2007 7,223,694'Method for improving selectivity of electroless metal deposition'2007 7,208,327'Metal oxide sensors and method of forming'2007 7,192,856'Forming dual metal complementary metal oxide semiconductor integrated circuits'2007 7,157,380'Damascene process for fabricating interconnect layers in an integrated circuit'2007 7,149,085'Electroosmotic pump apparatus that generates low amount of hydrogen gas'2006 7,135,775'Enhancement of an interconnect'2006 7,122,461'Method to assemble structures from nano-materials'2006 7,118,941'Method of fabricating a composite carbon nanotube thermal interface device'2006 7,112,472'Methods of fabricating a composite carbon nanotube thermal interface device'2006 7,105,851'Nanotubes for integrated circuits'2006 7,087,104'Preparation of electroless deposition solutions'2006 7,087,517'Method to fabricate interconnect structures'2006 7,060,617'Method of protecting a seed layer for electroplating'2006 7,049,234'Multiple stage electroless deposition of a metal layer'2006 7,008,872'Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures'2006 7,001,641'Seed layer treatment'2006 7,001,782'Method and apparatus for filling interlayer vias on ferroelectric polymer substrates'2006 6,977,224'Method of electroless introduction of interconnect structures'2005 6,958,547'Interconnect structures containing conductive electrolessly deposited etch stop layers, liner layers, and via plugs'2005 6,933,230'Method for making interconnects and diffusion barriers in integrated circuits'2005 6,933,171'Large bumps for optical flip chips'2005 6,933,222'Microcircuit fabrication and interconnection'2005 6,921,684'Method of sorting carbon nanotubes including protecting metallic nanotubes and removing the semiconducting nanotubes'2005 6,908,504'Electroless plating bath composition and method of using'2005 6,893,550'Electroplating bath composition and method of using'2005 6,843,852'Apparatus and method for electroless spray deposition'2005 6,841,458'Dopant interface formation'2005 6,828,613'Dopant interface formation'2004 6,733,679'Method of treating an electroless plating waste'2004 6,696,758'Interconnect structures and a method of electroless introduction of interconnect structures'2004 6,677,233'Material deposition from a liquefied gas solution'2004 6,645,567'Electroless plating bath composition and method of using'2003 6,518,184'Enhancement of an interconnect'2003 6,491,806'Electroplating bath composition'2002 6,432,821'Method of copper electroplating'2002 6,362,100'Methods and apparatus for forming a copper interconnect'2002 6,359,328'Methods for making interconnects and diffusion barriers in integrated circuits'2002 6,271,591'Copper-aluminum metallization'2001 6,249,055'Self-encapsulated copper metallization'2001 6,162,726'Gas shielding during plating'2000 6,106,680'Apparatus for forming a copper interconnect'2000 6,077,780'Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure'2000 6,065,424'Electroless deposition of metal films with spray processor'2000 6,001,415'Via with barrier layer for impeding diffusion of conductive material from via into insulator'1999 5,972,192'Pulse electroplating copper or copper alloys'1999 5,968,333'Method of electroplating a copper or copper alloy interconnect'1999 5,969,422'Plated copper interconnect structure'1999 5,913,147'Method for fabricating copper-aluminum metallization'1999 5,895,562'Gas shielding during plating'1999 5,891,513'Electroless CU deposition on a barrier layer by CU contact displacement for ULSI applications'1999 5,882,498'Method for reducing oxidation of electroplating chamber contacts and improving uniform electroplating of a substrate'1999 5,833,820'Electroplating apparatus'1998 5,830,805'Electroless deposition equipment or apparatus and method of performing electroless deposition'1998 5,824,599'Protected encapsulation of catalytic layer for electroless copper interconnect'1998 5,695,810'Use of cobalt tungsten phosphide as a barrier material for copper metallization'1997 5,674,787'Selective electroless copper deposited interconnect plugs for ULSI applications'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2019Patents assigned to INTEL CORP (93)· patent assignee history

1997–2000Patents assigned to CORNELL RES FOUNDATION INC (5)· patent assignee history

1997–1999Patents assigned to SEMATECH INC (5)· patent assignee history

1997–2001Based in Cupertino, CA, US· patent location history

1998–2002Patents assigned to ADVANCED MICRO DEVICES INC (13)· patent assignee history

2000–2019Based in Portland, OR, US· patent location history

2012–2017Patents assigned to DUBIN VALERY M (10)· patent assignee history

2016Based in Beaverton, OR, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	93	1997–2019
ADVANCED MICRO DEVICES INC	13	1998–2002
DUBIN VALERY Mself	10	2012–2017
CORNELL RES FOUNDATION INC	5	1997–2000
SEMATECH INC	5	1997–1999

Locations

Location	Patents	Span
Portland, OR, US	94	2000–2019
Cupertino, California, US	18	1997–2001
Beaverton, OR, US	1	2016