Inventor
Jagar Singh
Inventor
Clifton Park, NY, US
Overview
Patents· 58 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices33%
H10DInorganic electric semiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H01FMagnets2%
B82YSpecific uses or applications of nanostructures1%
G01RMeasuring electric variables1%
H10BElectronic memory devices1%
G11CStatic stores1%
PatentTitleYear
10,879,171Vertically oriented metal silicide containing e-fuse device202010,832,842Insulating inductor conductors with air gap using energy evaporation material (EEM)202010,833,183Interlayer ballistic transport semiconductor devices202010,699,961Isolation techniques for high-voltage device structures202010,644,149LDMOS fin-type field-effect transistors including a dummy gate202010,593,754SOI device structures with doped regions providing charge sinking202010,546,943Methods, apparatus, and system for reducing leakage current in semiconductor devices202010,510,662Vertically oriented metal silicide containing e-fuse device and methods of making same201910,475,921Laterally diffused field effect transistor and a method of manufacturing the same201910,461,029Hybrid material electrically programmable fuse and methods of forming201910,453,605Insulating inductor conductors with air gap using energy evaporation material (EEM)201910,332,834Semiconductor fuses with nanowire fuse links and fabrication methods thereof201910,290,698Substrate resistor with overlying gate structure201910,290,712LDMOS finFET structures with shallow trench isolation inside the fin201910,276,700Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors201910,236,358Integration of gate structures and spacers with air gaps201910,236,367Bipolar semiconductor device with silicon alloy region in silicon well and method for making201910,164,006LDMOS FinFET structures with trench isolation in the drain extension201810,121,878LDMOS finFET structures with multiple gate structures201810,115,719Integrated circuits with resistor structures formed from MIM capacitor material and methods for fabricating same201810,056,368Fin diode with increased junction area201810,020,386High-voltage and analog bipolar devices20189,966,459Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors20189,960,248Fin-based RF diodes20189,905,668'Bipolar junction transistors and methods of fabrication'20189,876,010Resistor disposed directly upon a sac cap of a gate structure of a semiconductor structure20189,793,262'Fin diode with increased junction area'20179,780,212'Fin width measurement using quantum well structure'20179,773,781'Resistor and capacitor disposed directly upon a SAC cap of a gate structure of a semiconductor structure'20179,741,713'Parasitic lateral bipolar transistor with improved ideality and leakage currents'20179,704,966'Fin-based RF diodes'20179,666,717'Split well zero threshold voltage field effect transistor for integrated circuits'20179,647,145'Method, apparatus, and system for increasing junction electric field of high current diode'20179,620,587'Three-dimensional electrostatic discharge semiconductor device'20179,614,023'Substrate resistor with overlying gate structure'20179,601,486'ESD snapback based clamp for finFET'20179,601,428'Semiconductor fuses with nanowire fuse links and fabrication methods thereof'20179,543,378'Semiconductor devices and fabrication methods thereof'20179,530,553'High performance inductor/transformer and methods of making such inductor/transformer structures'20169,520,396'Method for making high voltage integrated circuit devices in a fin-type process and resulting devices'20169,508,743'Dual three-dimensional and RF semiconductor devices using local SOI'20169,508,795'Methods of fabricating nanowire structures'20169,455,316'Three-dimensional electrostatic discharge semiconductor device'20169,437,713'Devices and methods of forming higher tunability FinFET varactor'20169,418,993'Device and method for a LDMOS design for a FinFET integrated circuit'20169,349,718'ESD snapback based clamp for finFET'20169,343,456'Metal gate for robust ESD protection'20169,330,971'Method for fabricating integrated circuits including contacts for metal resistors'20169,324,827'Non-planar schottky diode and method of fabrication'20169,312,371'Bipolar junction transistors and methods of fabrication'20169,276,088'Method for making high voltage integrated circuit devices in a fin-type process and resulting devices'20169,263,385'Semiconductor fuses and fabrication methods thereof'20169,230,913'Metallization layers configured for reduced parasitic capacitance'20169,177,951'Three-dimensional electrostatic discharge semiconductor device'20158,946,039'Polysilicon resistor formation'20158,476,684'Field effect transistors having improved breakdown voltages and methods of forming the same'20137,504,328'Schottky barrier source/drain n-mosfet using ytterbium silicide'20097,002,175'Method of making resonant tunneling diodes and CMOS backend-process-compatible three dimensional (3-D) integration'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006Patents assigned to AGENCY SCIENCE TECH & RES (1)· patent assignee history
2006–2009Based in Singapore, SG· patent location history
2013Patents assigned to ANALOG DEVICES INC (1)· patent assignee history
2013Patents assigned to COYNE EDWARD JOHN (1)· patent assignee history
2013Patents assigned to DALY PAUL MALACHY (1)· patent assignee history
2013Based in Limerick, IE· patent location history
2015–2020Patents assigned to GLOBALFOUNDRIES INC (55)· patent assignee history
2015–2020Based in Clifton Park, NY, US· patent location history
2017Based in Malta, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 55 | 2015–2020 |
| AGENCY SCIENCE TECH & RES | 1 | 2006 |
| ANALOG DEVICES INC | 1 | 2013 |
| COYNE EDWARD JOHN | 1 | 2013 |
| DALY PAUL MALACHY | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Clifton Park, New York, US | 54 | 2015–2020 |
| Singapore, SG | 2 | 2006–2009 |
| Malta, New York, US | 1 | 2017 |
| Limerick, IE | 1 | 2013 |