Inventor
Wensheng Qian
Inventor
Shanghai, CN
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices53%
H01LSemiconductor devices19%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
PatentTitleYear
9,997,626NLDMOS device and method for manufacturing the same20189,997,605LDMOS device and its manufacturing method20189,484,455'Isolation NLDMOS device and a manufacturing method therefor'20169,478,640'LDMOS device with step-like drift region and fabrication method thereof'20169,130,003'Structure for picking up a collector and method of manufacturing the same'20159,117,900'RF LDMOS device and method of forming the same'20159,059,277'RF LDMOS device and fabrication method thereof'20159,029,948'LDMOS device with step-like drift region and fabrication method thereof'20159,012,279'SiGe HBT and method of manufacturing the same'20158,866,189'Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof'20148,829,650'Zener diode in a SiGe BiCMOS process and method of fabricating the same'20148,816,400'SiGe HBT having deep pseudo buried layer and manufacturing method thereof'20148,803,279'Structure for picking up a collector and manufacturing method thereof'20148,785,977'High speed SiGe HBT and manufacturing method thereof'20148,779,473'SiGe HBT device and manufacturing method of the same'20148,759,880'Ultra-high voltage SIGE HBT device and manufacturing method of the same'20148,748,238'Ultra high voltage SiGe HBT and manufacturing method thereof'20148,742,538'SiGe HBT and manufacturing method thereof'20148,716,111'Method for manufacturing trench type superjunction device and trench type superjunction device'20148,674,480'High voltage bipolar transistor with pseudo buried layers'20148,637,959'Vertical parasitic PNP device in a BiCMOS process and manufacturing method of the same'20148,598,678'Parasitic vertical PNP bipolar transistor and its fabrication method in BiCMOS process'20138,592,870'Pseudo buried layer and manufacturing method of the same, deep hole contact and bipolar transistor'20138,476,728'Parasitic PIN device in a BiCMOS process and manufacturing method of the same'20138,455,975'Parasitic PNP bipolar transistor in a silicon-germanium BiCMOS process'20138,420,475'Parasitic vertical PNP bipolar transistor and its fabrication method in BiCMOS process'20138,420,495'Manufacturing approach for collector and a buried layer of bipolar transistor'20138,421,185'Parasitic vertical PNP bipolar transistor in BiCMOS process'20138,395,188'Silicon-germanium heterojunction bipolar transistor'20138,378,457'Silicon-germanium heterojunction bipolar transistor'20138,222,114'Manufacturing approach for collector and a buried layer of bipolar transistor'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2015Patents assigned to SHANGHAI HUAHONG NEC ELECT CO (25)· patent assignee history
2012–2018Patents assigned to QIAN WENSHENG (15)· patent assignee history
2012–2014Patents assigned to CHIU TZUYIN (5)· patent assignee history
2012–2018Based in Shanghai, CN· patent location history
2013–2015Patents assigned to LIU DONGHUA (9)· patent assignee history
2013–2015Patents assigned to HU JUN (6)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SHANGHAI HUAHONG NEC ELECT CO | 25 | 2012–2015 |
| QIAN WENSHENGself | 15 | 2012–2018 |
| LIU DONGHUA | 9 | 2013–2015 |
| HU JUN | 6 | 2013–2015 |
| CHIU TZUYIN | 5 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Shanghai, CN | 31 | 2012–2018 |