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Inventor

Gilberto Curatola

Inventor
Villach, AT

Overview

50→
Patents
2010–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 50 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices39%
H01LSemiconductor devices29%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
B82YSpecific uses or applications of nanostructures2%
H03KPulse technique2%
B65DContainers for storage or transport of articles or materials, e.g. bags, barrels, bottles, boxes, cans, cartons, crates, drums, jars, tanks, hoppers, forwarding containers1%
C12QMeasuring or testing processes involving enzymes, nucleic acids or microorganisms1%
G01RMeasuring electric variables1%
PatentTitleYear
10,840,353High electron mobility transistor with dual thickness barrier layer202010,636,899High electron mobility transistor with graded back-barrier region202010,541,313High Electron Mobility Transistor with dual thickness barrier layer202010,516,023High electron mobility transistor with deep charge carrier gas contact structure201910,332,876Method of forming compound semiconductor body201910,276,669Sloped field plate and contact structures for semiconductor devices and methods of manufacturing thereof201910,204,995Normally off HEMT with self aligned gate structure201910,153,362Semiconductor device201810,074,597Interdigit device on leadframe for evenly distributed current flow201810,038,085High electron mobility transistor with carrier injection mitigation gate structure20189,884,715'Food package with integrated RFID-tag and sensor'20189,825,139'Semiconductor device and method'20179,735,141'Compound semiconductor transistor with gate overvoltage protection'20179,653,591'Compound semiconductor device having at least one buried semiconductor material region'20179,570,438'Avalanche-rugged quasi-vertical HEMT'20179,564,524'Semiconductor device and method'20179,559,161'Patterned back-barrier for III-nitride semiconductor devices'20179,553,183'Gate stack for normally-off compound semiconductor transistor'20179,443,941'Compound semiconductor transistor with self aligned gate'20169,431,499'Method of manufacturing a stress-controlled HEMT'20169,406,673'Semiconductor component with transistor'20169,397,208'Compound semiconductor device'20169,373,688'Normally-off high electron mobility transistors'20169,356,017'Switch circuit and semiconductor device'20169,356,130'HEMT with compensation structure'20169,305,917'High electron mobility transistor with RC network integrated into gate structure'20169,287,414'Integrated circuit'20169,276,097'Gate overvoltage protection for compound semiconductor transistors'20169,196,693'Method of manufacturing a semiconductor device having a buried field plate'20159,147,740'Stress-controlled HEMT'20159,123,791'Semiconductor device and method'20159,034,637'Apparatus and method for molecule detection using nanopores'20159,024,356'Compound semiconductor device with buried field plate'20158,963,219'Tunnel field effect transistor'20158,952,421'RF power HEMT grown on a silicon or SiC substrate with a front-side plug connection'20158,906,534'Stacked multi-cell battery concept'20148,900,985'Self-doped ohmic contacts for compound semiconductor devices'20148,835,932'Normally-off compound semiconductor tunnel transistor with a plurality of charge carrier gases'20148,823,443'Charge-pump circuit'20148,801,917'Electrochemical potentiometric sensing without reference electrode'20148,709,885'Schottky diode and method of manufacture'20148,674,372'HEMT with integrated low forward bias diode'20148,659,104'Field-effect magnetic sensor'20148,637,375'Method of manufacturing a tunnel transistor and IC comprising the same'20148,586,993'Normally-off compound semiconductor tunnel transistor'20138,569,799'III-V semiconductor devices with buried contacts'20138,362,561'Transistor device and method of manufacturing such a transistor device'20138,227,841'Self-aligned impact-ionization field effect transistor'20127,923,346'Field effect transistor structure with an insulating layer at the junction'20117,839,209'Tunnel field effect transistor'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2018Patents assigned to NXP BV (10)· patent assignee history
2010–2018Based in Korbek-Lo, BE· patent location history
2012–2018Patents assigned to CURATOLA GILBERTO (20)· patent assignee history
2013–2016Patents assigned to INFINEON TECHNOLOGIES AUSTRIA (16)· patent assignee history
2013–2020Based in Villach, AT· patent location history
2014–2018Patents assigned to MERZ MATTHIAS (4)· patent assignee history
2014–2016Based in Redhill, GB· patent location history
2014Based in Leuven, BE· patent location history
2016–2020Patents assigned to INFINEON TECHNOLOGIES AUSTRIA AG (20)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CURATOLA GILBERTOself202012–2018
INFINEON TECHNOLOGIES AUSTRIA AG202016–2020
INFINEON TECHNOLOGIES AUSTRIA162013–2016
NXP BV102010–2018
MERZ MATTHIAS42014–2018
Locations
LocationPatentsSpan
Villach, AT362013–2020
Korbek-Lo, BE112010–2018
Redhill, GB22014–2016
Leuven, BE12014