Inventor
Brijesh Tripathi
Inventor
Los Altos, CA, US
Overview
Patents· 72 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G09Gprimary
G09GArrangements or circuits for control of indicating devices using static means to present variable information29%
G06FElectric digital data processing21%
G06TImage data processing or generation, in general17%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use8%
H04NPictorial communication, e.g. television4%
H04LTransmission of digital information, e.g. telegraphic communication3%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications3%
A61GTransport, personal conveyances, or accommodation specially adapted for patients or disabled persons2%
B60PVehicles adapted for load transportation or to transport, to carry, or to comprise special loads or objects2%
G01DMeasuring not specially adapted for a specific variable2%
PatentTitleYear
11,079,261System on a chip with always-on processor202111,068,088Electronic devices with adaptive frame rate displays202111,024,243Electronic device display with charge accumulation tracker202110,965,728Method and system for aggregating and converting sensor data streams202110,861,622High-speed cable assembly202010,789,902Electronic device display with charge accumulation tracker202010,706,825Timestamp based display update mechanism202010,592,021Electronic devices with adaptive frame rate displays202010,515,028Reference voltage calibration using a qualified weighted average201910,488,230System on a chip with always-on processor201910,319,333Refresh rate matching for displays201910,261,894System on a chip with always-on processor which reconfigures SOC and supports memory-only communication mode201910,102,815Electronic device display with charge accumulation tracker201810,049,073Interface emulator using FIFOs201810,031,000System on a chip with always-on processor201810,019,387Reference voltage calibration using a qualified weighted average201810,019,086Electronic devices with adaptive frame rate displays20189,953,591Managing two dimensional structured noise when driving a display with multiple display pipes20189,922,608'Electronic device display with charge accumulation tracker'20189,880,649'Touch, pen and force sensor operation with variable refresh displays'20189,785,184'Maintaining synchronization during vertical blanking'20179,703,748'Method and apparatus of emulating interfaces using FIFOs'20179,691,360'Alpha channel power savings in graphics unit'20179,691,349'Source pixel component passthrough'20179,658,634'Under voltage detection and performance throttling'20179,652,816'Reduced frame refresh rate'20179,652,194'Cable with video processing capability'20179,619,377'System on a chip with always-on processor which reconfigures SOC and supports memory-only communication mode'20179,620,081'Hardware auxiliary channel for synchronous backlight update'20179,607,574'Video data compression format'20179,495,926'Variable frame refresh rate'20169,489,712'Multiple simultaneous unique outputs from a single display pipeline'20169,471,955'Multiple display pipelines driving a divided display'20169,355,585'Electronic devices with adaptive frame rate displays'20169,336,563'Buffer underrun handling'20169,286,855'Display panel self-refresh entry and exit'20169,204,172'Backwards compatible extended image format'20159,191,551'Pixel normalization'20159,158,350'Link clock change during veritcal blanking'20159,153,212'Compressed frame writeback and read for display in idle screen on case'20159,148,571'Image distortion correction in scaling circuit'20159,123,278'Performing inline chroma downsampling with reduced power consumption'20159,116,639'Maintaining synchronization during vertical blanking'20159,087,393'Network display support in an integrated circuit'20159,058,676'Mechanism to detect idle screen on'20159,035,961'Display pipe alternate cache hint'20159,036,908'Backwards compatible extended image format'20159,015,217'Transcendental and non-linear components using series expansion'20159,013,493'Low power display port with arbitrary link clock frequency'20158,963,940'Isochronous hub contracts'20158,963,946'Non-real-time dither using a programmable matrix'20158,922,571'Display pipe request aggregation'20148,860,750'Devices and methods for dynamic dithering'20148,838,859'Cable with fade and hot plug features'20148,831,161'Methods and apparatus for low power audio visual interface interoperability'20148,797,359'Inline image rotation'20148,773,455'RGB-out dither interface'20148,725,918'Cable with fade and hot plug features'20148,687,922'Parallel scaler processing'20148,675,004'Buffer underrun handling'20148,649,286'Quality of service (QoS)-related fabric control'20148,644,782'Agile clocking with receiver PLL management'20148,447,035'Contract based memory management for isochronous streams'20138,165,257'Methods and apparatus for interface buffer management and clock compensation in data transfers'20128,154,556'Multiple simultaneous unique outputs from a single display pipeline'20128,155,316'Contract based memory management for isochronous streams'20128,125,491'Multiple simultaneous unique outputs from a single display pipeline'20127,515,208'Apparatus, system, and method for detecting AC-coupled electrical loads'20097,499,516'Methods and apparatus for interface buffer management and clock compensation in data transfers'20097,426,594'Apparatus, system, and method for arbitrating between memory requests'20087,369,132'Apparatus, system, and method for delivering data to multiple memory clients via a unitary buffer'20087,221,369'Apparatus, system, and method for delivering data to multiple memory clients via a unitary buffer'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2016Patents assigned to NVIDIA CORP (9)· patent assignee history
2007–2016Based in Santa Clara, CA, US· patent location history
2009–2012Based in Whitehall, PA, US· patent location history
2012–2017Patents assigned to TRIPATHI BRIJESH (26)· patent assignee history
2014–2021Patents assigned to APPLE INC (58)· patent assignee history
2014–2017Patents assigned to BHARGAVA NITIN (6)· patent assignee history
2014–2017Patents assigned to OKRUHLICA CRAIG M (6)· patent assignee history
2014–2021Based in Los Altos, CA, US· patent location history
2014–2020Based in San Jose, CA, US· patent location history
2014Based in Cupertino, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| APPLE INC | 58 | 2014–2021 |
| TRIPATHI BRIJESHself | 26 | 2012–2017 |
| NVIDIA CORP | 9 | 2007–2016 |
| BHARGAVA NITIN | 6 | 2014–2017 |
| OKRUHLICA CRAIG M | 6 | 2014–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Los Altos, California, US | 39 | 2014–2021 |
| San Jose, California, US | 20 | 2014–2020 |
| Santa Clara, California, US | 10 | 2007–2016 |
| Whitehall, Pennsylvania, US | 2 | 2009–2012 |
| Cupertino, California, US | 1 | 2014 |