Inventor
Tien-Wei Chiang
Inventor
Taipei, TW
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices20%
H10BElectronic memory devices20%
H10NElectric solid-state devices not otherwise provided for20%
G11CStatic stores14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
G01RMeasuring electric variables3%
G11BInformation storage based on relative movement between record carrier and transducer3%
H01FMagnets2%
H10DInorganic electric semiconductor devices2%
PatentTitleYear
11,088,083DC and AC magnetic field protection for MRAM device using magnetic-field-shielding structure202111,088,199Semiconductor device202110,877,089Semiconductor wafer testing system and related method for improving external magnetic field wafer testing202010,878,928One-time-programmable (OTP) implementation using magnetic junctions202010,868,234Storage device having magnetic tunnel junction cells of different sizes, and method of forming storage device202010,818,609Package structure and method for fabricating the same202010,665,321Method for testing MRAM device and test apparatus thereof202010,522,591Integration of magneto-resistive random access memory and capacitor201910,510,804Semiconductor structure integrated with magnetic tunneling junction and manufacturing method thereof201910,510,802Semiconductor device and method of manufacturing the same201910,497,861Manufacturing techniques and corresponding devices for magnetic tunnel junction devices201910,096,767Elongated magnetoresistive tunnel junction structure201810,068,945Semiconductor structure integrated with magnetic tunneling junction and manufacturing method thereof201810,043,970Determining a characteristic of a monitored layer on an integrated chip20189,767,878'Semiconductor memory device and method for controlling the same'20179,716,222'Semiconductor structure and method for manufacturing the same'20179,691,969'Semiconductor integrated circuit and method of making the same'20179,666,790'Manufacturing techniques and corresponding devices for magnetic tunnel junction devices'20179,620,500'Series-connected transistor structure'20179,373,620'Series connected transistor structure and method of manufacturing the same'20168,884,386'MRAM device and fabrication method thereof'20148,823,117'Magnetic device fabrication'20148,750,031'Test structures, methods of manufacturing thereof, test methods, and MRAM arrays'20148,570,792'Magnetoresistive random access memory'20138,477,531'Spin torque transfer magnetoresistive random access memory in disk base with reduced threshold current'20138,471,598'Magnetic logic device'20138,450,722'Magnetoresistive random access memory and method of making the same'2013Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2013–2014Patents assigned to CHIANG TIEN-WEI (7)· patent assignee history
2013–2014Patents assigned to TAIWAN SEMICONDUCTOR MFG (7)· patent assignee history
2013–2014Patents assigned to KAO YA-CHEN (4)· patent assignee history
2013–2014Patents assigned to YU CHWEN (3)· patent assignee history
2013–2021Based in Taipei, TW· patent location history
2013–2014Based in Hsinchu, TW· patent location history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (20)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 20 | 2016–2021 |
| CHIANG TIEN-WEIself | 7 | 2013–2014 |
| TAIWAN SEMICONDUCTOR MFG | 7 | 2013–2014 |
| KAO YA-CHEN | 4 | 2013–2014 |
| YU CHWEN | 3 | 2013–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taipei, TW | 23 | 2013–2021 |
| Hsinchu, TW | 4 | 2013–2014 |