Inventor

Alex See

Inventor

Singapore, SG

Overview

36→

Patents

2001–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 36 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices24%

H01LSemiconductor devices20%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%

H10BElectronic memory devices9%

H10NElectric solid-state devices not otherwise provided for5%

B24BMachines, devices, or processes for grinding or polishing3%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%

H01FMagnets1%

Y10TTechnical subjects covered by former us classification1%

PatentTitleYear

10,608,046Integrated two-terminal device with logic device for embedded application2020 10,446,607Integrated two-terminal device with logic device for embedded application2019 10,410,854Method and device for reducing contamination for reliable bond pads2019 10,115,625Methods for removal of hard mask2018 10,103,097CD control2018 9,646,934'Integrated circuits with overlay marks and methods of manufacturing the same'2017 9,620,418'Methods for fabricating integrated circuits with improved active regions'2017 9,548,371'Integrated circuits having nickel silicide contacts and methods for fabricating the same'2017 9,543,502'Small pitch and high density contact array'2017 9,537,092'Integrated circuits with memory cells and methods of manufacturing the same'2017 9,520,371'Planar passivation for pads'2016 9,511,474'CMP head structure with retaining ring'2016 9,511,470'CMP head structure with retaining ring'2016 9,437,547'Through silicon vias'2016 9,209,275'Integrated circuits with memory cells and methods of manufacturing the same'2015 9,202,746'Integrated circuits with improved gap fill dielectric and methods for fabricating same'2015 8,912,102'Laser annealing'2014 8,860,142'Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction'2014 8,754,447'Strained channel transistor structure and method'2014 8,716,076'Method for fabricating a semiconductor device having an epitaxial channel and transistor having same'2014 8,546,873'Integrated circuit and method of fabrication thereof'2013 8,324,011'Implementation of temperature-dependent phase switch layer for improved temperature uniformity during annealing'2012 8,293,544'Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction'2012 8,058,123'Integrated circuit and method of fabrication thereof'2011 8,012,839'Method for fabricating a semiconductor device having an epitaxial channel and transistor having same'2011 7,989,338'Grain boundary blocking for stress migration and electromigration improvement in CU interconnects'2011 7,960,283'Method for reducing silicide defects in integrated circuits'2011 7,892,900'Integrated circuit system employing sacrificial spacers'2011 7,795,680'Integrated circuit system employing selective epitaxial growth technology'2010 7,776,699'Strained channel transistor structure and method'2010 7,745,320'Method for reducing silicide defects in integrated circuits'2010 7,585,768'Combined copper plating method to improve gap fill'2009 7,091,092'Process flow for a performance enhanced MOSFET with self-aligned, recessed channel'2006 6,650,220'Parallel spiral stacked inductor on semiconductor material'2003 6,391,720'Process flow for a performance enhanced MOSFET with self-aligned, recessed channel'2002 6,204,137'Method to form transistors and local interconnects using a silicon nitride dummy gate technique'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2011Patents assigned to CHARTERED SEMICONDUCTOR MFG (8)· patent assignee history

2001–2020Based in Singapore, SG· patent location history

2011–2020Patents assigned to GLOBALFOUNDRIES SG PTE LTD (27)· patent assignee history

2011–2014Patents assigned to ZHOU MEI SHENG (6)· patent assignee history

2011–2014Patents assigned to HSIA LIANG CHOO (5)· patent assignee history

2011–2014Patents assigned to SEE ALEX K H (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
GLOBALFOUNDRIES SG PTE LTD	27	2011–2020
CHARTERED SEMICONDUCTOR MFG	8	2001–2011
ZHOU MEI SHENG	6	2011–2014
HSIA LIANG CHOO	5	2011–2014
SEE ALEX K Hself	4	2011–2014

Locations

Location	Patents	Span
Singapore, SG	36	2001–2020