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Inventor

Albert Molina

Inventor
Novelda, ES

Overview

24→
Patents
2006–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 24 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication21%
H04BTransmission18%
H03MCoding17%
G06FElectric digital data processing14%
H03FAmplifiers11%
H03HImpedance networks, e.g. resonant circuits10%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H04JMultiplex communication3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses1%
H04WWireless communication networks1%
PatentTitleYear
11,038,516Apparatus and method for analog-to-digital conversion202110,868,556Apparatus for calibrating a time-interleaved analog-to-digital converter202010,742,225n-bit successive approximation register analog-to-digital converter and method for calibrating the same, receiver, base station and mobile device202010,601,434Apparatus for calibrating a time-interleaved analog-to-digital converter202010,164,800Channel estimation using peak cancellation20189,942,078Methods and apparatus for simultaneous estimation of frequency offset and channel response for MU-MIMO OFDMA20189,923,595'Digital predistortion for dual-band power amplifiers'20189,778,902'Software digital front end (SoftDFE) signal processing'20179,529,567'Digital processor having instruction set with complex exponential non-linear function'20169,292,255'Multi-stage crest factor reduction (CFR) for multi-channel multi-standard radio'20169,280,315'Vector processor having instruction set with vector convolution function for fir filtering'20168,982,992'Block-based crest factor reduction (CFR)'20158,897,388'Crest factor reduction (CFR) using asymmetrical pulses'20148,831,133'Recursive digital pre-distortion (DPD)'20148,811,927'Method for estimating a plurality of estimated transfer functions corresponding to wireless channels in a multiple-input system'20148,595,604'Methods and apparatus for search sphere linear block decoding'20138,553,814'Rapid sampling phase recovery'20138,515,376'Receiver and method for estimating a plurality of estimated transfer functions corresponding to wireless channels in a multiple-input system'20138,385,489'Methods and apparatus for wireless channel estimation using interpolation elimination in the Eigen domain'20138,290,462'Receiver and method for estimating a plurality of estimated transfer functions corresponding to wireless channels in a multiple-input system'20128,015,226'Methods and apparatus for performing reduced complexity discrete fourier transforms using interpolation'20117,643,315'Programmable feedback voltage pulse sampling for switched power supplies'20107,471,531'Programmable feedback voltage pulse sampling for switched power supplies'20087,020,068'Echo and crosstalk cancellation'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2018Based in Madrid, ES· patent location history
2008–2010Based in Alcobendad, ES· patent location history
2012–2018Patents assigned to MOLINA ALBERT (6)· patent assignee history
2012–2018Patents assigned to AZADET KAMERAN (5)· patent assignee history
2012–2018Patents assigned to HIJAZI SAMER (5)· patent assignee history
2013–2015Patents assigned to LSI CORP (6)· patent assignee history
2014–2021Based in Novelda, ES· patent location history
2014Based in Alicante, ES· patent location history
2016–2021Patents assigned to INTEL CORP (10)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP102016–2021
LSI CORP62013–2015
MOLINA ALBERTself62012–2018
AZADET KAMERAN52012–2018
HIJAZI SAMER52012–2018
Locations
LocationPatentsSpan
Novelda, ES132014–2021
Madrid, ES82006–2018
Alcobendad, ES22008–2010
Alicante, ES12014