Inventor

Takahiro Tsuruda

Inventor

Hyogo, JP

Overview

1995–2007

Patent span

Electricity

Primary field (CPC H)

Patents· 39 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores36%

H10DInorganic electric semiconductor devices30%

H10BElectronic memory devices22%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%

H03KPulse technique3%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3%

PatentTitleYear

7,242,060'Semiconductor memory device including an SOI substrate'2007 7,138,684'Semiconductor memory device including an SOI substrate'2006 6,787,853'Semiconductor device using an SOI substrate'2004 6,768,662'Semiconductor memory device including an SOI substrate'2004 6,606,266'Nonvolatile semiconductor memory device capable of writing multilevel data at high rate'2003 6,586,803'Semiconductor device using an SOI substrate'2003 6,577,534'Non-volatile semiconductor memory device having a low defective rate'2003 6,577,522'Semiconductor memory device including an SOI substrate'2003 6,487,115'Non-volatile semiconductor memory device with writing sequence enabling early-stage judgement of writing'2002 6,384,445'Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions'2002 6,385,159'Semiconductor memory device including an SOI substrate'2002 6,337,506'Semiconductor memory device capable of performing stable operation for noise while preventing increase in chip area'2002 6,288,949'Semiconductor memory device including an SOI substrate'2001 6,272,034'Semiconductor memory device'2001 6,215,720'High speed operable semiconductor memory device with memory blocks arranged about the center'2001 6,214,664'Method of manufacturing semiconductor device'2001 6,215,141'Semiconductor device including a transistor having portions of source and drain regions removed by the same amount'2001 6,137,719'Nonvolatile semiconductor memory device storing multi-bit data'2000 6,091,647'Semiconductor memory device including an SOI substrate'2000 6,072,743'High speed operable semiconductor memory device with memory blocks arranged about the center'2000 6,069,379'Semiconductor device and method of manufacturing the same'2000 6,064,621'Multi-bank clock synchronous type semiconductor memory device having improved memory array and power supply arrangement'2000 6,060,738'Semiconductor device having SOI structure'2000 6,018,172'Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions'2000 5,982,005'Semiconductor device using an SOI substrate'1999 5,914,907'Semiconductor memory device capable of increasing chip yields while maintaining rapid operation'1999 5,872,737'Semiconductor integrated circuit device in which influence of power supply noise on internal circuitry during operation of input/output buffer is prevented'1999 5,848,012'Semiconductor memory device having hierarchical bit line structure employing improved bit line precharging system'1998 5,825,696'Semiconductor memory device including an SOI substrate'1998 5,815,428'Semiconductor memory device having hierarchical bit line structure'1998 5,796,664'Semiconductor memory device having divided word line'1998 5,773,865'Semiconductor memory and semiconductor device having SOI structure'1998 5,734,614'Dynamic semiconductor memory device using sense amplifier as cache memory'1998 5,652,726'Semiconductor memory device having hierarchical bit line structure employing improved bit line precharging system'1997 5,635,744'Semiconductor memory and semiconductor device having SOI structure'1997 5,604,707'Semiconductor memory device responsive to hierarchical internal potentials'1997 5,574,397'Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device'1996 5,512,501'Method of manufacturing a semiconductor device having an SOI structure'1996 5,390,140'Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2003Patents assigned to MITSUBISHI ELECTRIC CORP (34)· patent assignee history

1995–2007Based in Hyogo, JP· patent location history

2001Patents assigned to MITSUBHISHI DENKI K K (1)· patent assignee history

2004–2007Patents assigned to RENESAS TECH CORP (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MITSUBISHI ELECTRIC CORP	34	1995–2003
RENESAS TECH CORP	4	2004–2007
MITSUBHISHI DENKI K K	1	2001

Locations

Location	Patents	Span
Hyogo, JP	39	1995–2007