Inventor
Sarvesh H. Kulkarni
Inventor
Hillsboro, OR, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores20%
H10BElectronic memory devices20%
H10DInorganic electric semiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
G06FElectric digital data processing10%
H01LSemiconductor devices10%
PatentTitleYear
9,123,724'Methods of forming secured metal gate antifuse structures'20158,618,613'Methods of forming secured metal gate antifuse structures'20138,411,482'Programmable read only memory'20138,395,923'Antifuse programmable memory array'20137,380,099'Apparatus and method for an address generation circuit'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2015Patents assigned to INTEL CORP (5)· patent assignee history
2008–2015Based in Hillsboro, OR, US· patent location history
2013Patents assigned to CHEN ZHANPING (3)· patent assignee history
2013Patents assigned to KULKARNI SARVESH H (2)· patent assignee history
2013Patents assigned to ZHANG KEVIN (2)· patent assignee history
2013Patents assigned to HAFEZ WALID M (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 5 | 2008–2015 |
| CHEN ZHANPING | 3 | 2013 |
| KULKARNI SARVESH Hself | 2 | 2013 |
| ZHANG KEVIN | 2 | 2013 |
| HAFEZ WALID M | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hillsboro, OR, US | 5 | 2008–2015 |