Inventor

Tanay Karnik

Inventor
Portland, OR, US

Overview

105→
Patents
2002–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 105 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary
H03KPulse technique14%
G06FElectric digital data processing11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
G11CStatic stores7%
H01FMagnets7%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems7%
G01RMeasuring electric variables6%
H03FAmplifiers5%
H10DInorganic electric semiconductor devices5%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
PatentTitleYear
11,043,256High bandwidth destructive read embedded memory202111,037,614Imprint-free write driver for ferroelectric memory202110,942,556Early pre-charge enablement for peak power application in net zero energy devices202110,901,486Configurable interconnect apparatus and method202110,777,250Save-restore circuitry with metal-ferroelectric-metal devices202010,748,602Nonvolatile SRAM202010,749,104Combinatorial magneto electric spin orbit logic202010,642,338Hierarchical power management unit for low power and low duty cycle devices202010,607,885Shell structure for insulation of a through-substrate interconnect202010,559,348System, apparatus and method for simultaneous read and precharge of a memory202010,379,592Power management of an NZE IoT device201910,331,582Write congestion aware bypass for non-volatile memory, last level cache (LLC) dropping from write queue responsive to write queue being full and read queue threshold wherein the threshold is derived from latency of write to LLC and main memory retrieval time201910,261,923Configurable interconnect apparatus and method201910,024,916Sequential circuit with error detection20189,842,241'Biometric cryptography using micromachined ultrasound transducers'20179,594,625'Sequential circuit with error detection'20179,189,014'Sequential circuit with error detection'20159,124,174'DC-DC converter switching transistor current measurement technique'20158,994,344'Multiphase transformer for a multiphase DC-DC converter'20158,868,836'Reducing minimum operating voltage through hybrid cache design'20148,773,233'Integrated inductors'20148,710,869'High-speed comparator with asymmetric frequency response'20148,694,816'Power delivery system in which VRM and CPU exchange power consumption measurements'20148,629,667'Pulse width modulator with an adjustable waveform generator for controlling duty cycle of a pulse width modulated signal'20148,513,750'Forming inductor and transformer structures with magnetic materials using damascene processing for integrated circuits'20138,482,552'DC-DC converter switching transistor current measurement technique'20138,467,263'Memory write operation methods and circuits'20138,456,923'Register file circuits with P-type evaluation'20138,406,634'Method and apparatus for optical signaling'20138,373,074'Integrated inductor'20138,368,501'Integrated inductors'20138,361,594'Methods of forming magnetic vias to maximize inductance in integrated circuits and structures formed thereby'20138,358,112'Multiphase transformer for a multiphase DC-DC converter'20138,288,846'Power management integrated circuit'20128,283,771'Multi-die integrated circuit device and method'20128,198,965'Grounding of magnetic cores'20128,134,548'DC-DC converter switching transistor current measurement technique'20128,108,984'Method for manufacturing integrated circuit inductors having slotted magnetic material'20127,991,302'Method and apparatus for optical signaling'20117,867,787'Forming inductor and transformer structures with magnetic materials using damascene processing for integrated circuits'20117,843,304'Grounding of magnetic cores'20107,787,292'Carbon nanotube fuse element'20107,719,084'Laminated magnetic material for inductors in integrated circuits'20107,698,576'CPU power delivery system'20107,671,456'Power management integrated circuit'20107,653,850'Delay fault detection using latch with error sampling'20107,636,242'Integrated inductor'20097,602,257'Signal generating circuit'20097,568,115'Power delivery and power management of many-core processors'20097,538,653'Grounding of magnetic cores'20097,536,107'Optical offset signal cancellation for optical receiver'20097,528,619'0th droop detector architecture and implementation'20097,523,337'Power delivery system in which power supply and load exchange power consumption measurements via digital bus'20097,518,481'Slotted magnetic material for integrated circuit inductors'20097,505,497'Laser driver for high speed short distance links'20097,504,808'Multiphase transformer for a multiphase DC-DC converter'20097,436,277'Power transformer'20087,423,508'Control of eddy currents in magnetic vias for inductors and transformers in integrated circuits'20087,394,298'Stepwise drivers for DC/DC converters'20087,386,080'High-speed data sampler for optical interconnect'20087,372,382'Voltage regulation using digital voltage control'20087,348,821'Programmable high-resolution timing jitter injectors high-resolution timing jitter injectors'20087,315,463'Apparatus and method for multi-phase transformers'20087,274,181'Systems, multiphase power converters with droop-control circuitry and methods'20077,274,250'Low-voltage, buffered bandgap reference with selectable output voltage'20077,265,607'Voltage regulator'20077,262,632'Signal measurement systems and methods'20077,247,930'Power management integrated circuit'20077,236,410'Memory cell driver circuits'20077,224,203'Analog voltage distribution on a die using switched capacitors'20077,215,173'Low-swing level shifter'20077,212,021'Manufacturing integrated circuits and testing on-die power supplies using distributed programmable digital current sinks'20077,208,963'Method and apparatus for measuring coil current'20077,199,665'Single to dual non-overlapping converter'20077,169,631'Silicon and silicon/germanium light-emitting device, methods and systems'20077,167,397'Apparatus and method for programming a memory array'20077,161,439'Oscillator delay stage with active inductor'20077,098,766'Magnetic material for transformers and/or inductors'20067,088,191'Delay interpolation in a ring oscillator delay stage'20067,088,138'Symmetric and non-stacked XOR circuit'20067,053,663'Dynamic gate with conditional keeper for soft error rate reduction'20067,042,274'Regulated sleep transistor apparatus, method, and system'20067,038,515'Soft-error rate hardened pulsed latch'20067,030,676'Timing circuit for separate positive and negative edge placement in a switching DC-DC converter'20067,023,023'Optical interconnects in integrated circuits'20066,995,605'Resonance suppression circuit'20066,967,515'Single-ended to differential conversion circuit with duty cycle correction'20056,958,640'Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver'20056,924,510'Silicon and silicon/germanium light-emitting device, methods and systems'20056,878,920'Optical receiver circuit, method, and system'20056,849,909'Method and apparatus for weak inversion mode MOS decoupling capacitor'20056,838,863'Voltage converter utilizing independently switched inductors'20056,828,857'High gain, high bandwidth CMOS transimpedance amplifier'20046,828,638'Decoupling capacitors for thin gate oxides'20046,798,248'Non-overlapping clock generation'20046,771,862'Signaling medium and apparatus'20046,737,924'Differential, double feedback CMOS transimpedance amplifier with noise tolerance'20046,690,239'High bandwidth, low power, single stage cascode transimpedance amplifier for short haul optical links'20046,639,472'High bandwidth, low power, single stage cascode transimpedance amplifier for short haul optical links'20036,617,890'Measuring power supply stability'20036,552,887'Voltage dependent capacitor configuration for higher soft error rate tolerance'20036,504,412'Storage element with switched capacitor'20036,483,363'Storage element with stock node capacitive load'20026,380,781'Soft error rate tolerant latch'20026,366,132'Soft error resistant circuits'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2021Patents assigned to INTEL CORP (101)· patent assignee history
2002–2021Based in Portland, OR, US· patent location history
2012–2015Patents assigned to KARNIK TANAY (20)· patent assignee history
2012–2014Patents assigned to HAZUCHA PETER (14)· patent assignee history
2012–2014Patents assigned to SCHROM GERHARD (13)· patent assignee history
2012–2014Patents assigned to PAILLET FABRICE (10)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP1012002–2021
KARNIK TANAYself202012–2015
HAZUCHA PETER142012–2014
SCHROM GERHARD132012–2014
PAILLET FABRICE102012–2014
Locations
LocationPatentsSpan
Portland, OR, US1052002–2021