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Inventor

Shuxian Wu

Inventor
San Jose, CA, US

Overview

15→
Patents
2010–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 15 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices30%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H01LSemiconductor devices15%
G06FElectric digital data processing9%
H01FMagnets9%
H03HImpedance networks, e.g. resonant circuits3%
H05KPrinted circuits3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
Y10TTechnical subjects covered by former us classification3%
PatentTitleYear
10,847,604Systems and methods for providing capacitor structures in an integrated circuit202010,756,019Systems providing interposer structures20209,923,051'Substrate noise isolation structures for semiconductor devices'20189,524,964'Capacitor structure in an integrated circuit'20169,270,247'High quality factor inductive and capacitive circuit structure'20168,922,309'Devices and methods for tuning an inductor'20148,878,337'Integrated circuit structure having a capacitor structured to reduce dishing of metal layers'20148,860,180'Inductor structure with a current return encompassing a coil'20148,650,020'Modeling second order effects for simulating transistor behavior'20148,427,266'Integrated circuit inductor having a patterned ground shield'20138,224,637'Method and apparatus for modeling transistors in an integrated circuit design'20128,150,638'Predicting parasitic capacitance in schematic circuit simulations using sub-circuit modeling'20127,956,385'Circuit for protecting a transistor during the manufacture of an integrated circuit device'20117,932,563'Techniques for improving transistor-to-transistor stress uniformity'20117,772,093'Method of and circuit for protecting a transistor formed on a die'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2020Patents assigned to XILINX INC (15)· patent assignee history
2010–2020Based in San Jose, CA, US· patent location history
2012–2014Patents assigned to WU SHUXIAN (6)· patent assignee history
2012–2014Patents assigned to YU TAO (2)· patent assignee history
2012Patents assigned to CHAN KAIMAN (1)· patent assignee history
2013–2014Patents assigned to JING JING (2)· patent assignee history
2020Based in Saratoga, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
XILINX INC152010–2020
WU SHUXIANself62012–2014
JING JING22013–2014
YU TAO22012–2014
CHAN KAIMAN12012
Locations
LocationPatentsSpan
San Jose, California, US142010–2020
Saratoga, California, US12020