Inventor
Francis B. Heile
Inventor
Santa Clara, CA, US
Overview
Patents· 46 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique45%
G06FElectric digital data processing15%
G01RMeasuring electric variables11%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes9%
G11CStatic stores9%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests9%
H05KPrinted circuits1%
PatentTitleYear
7,148,722'PCI-compatible programmable logic devices'20066,815,981'Programmable logic array integrated circuit devices'20046,759,870'Programmable logic array integrated circuits'20046,646,467'PCI-compatible programmable logic devices'20036,556,500'Programmable logic array device with random access memory configurable as product terms'20036,490,717'Generation of sub-netlists for use in incremental compilation'20026,453,382'Content addressable memory encoded outputs'20026,414,514'Logic device architecture and method of operation'20026,392,438'Programmable logic array integrated circuit devices'20026,367,058'Partitioning using hardware'20026,366,121'Programmable logic array integrated circuit architectures'20026,347,061'Programmable logic array device with random access memory configurable as product terms'20026,344,989'Programmable logic devices with improved content addressable memory capabilities'20026,326,807'Programmable logic architecture incorporating a content addressable embedded array block'20016,321,369'Interface for compiling project variations in electronic design environments'20016,317,860'Electronic design automation tool for display of design profile'20016,298,319'Incremental compilation of electronic design for work group'20016,294,928'Programmable logic device with highly routable interconnect'20016,271,681'PCI-compatible programmable logic devices'20016,259,272'Programmable logic array integrated circuit architectures'20016,204,688'Programmable logic array integrated circuit devices with interleaved logic array blocks'20016,195,788'Mapping heterogeneous logic elements in a programmable logic device'20016,184,706'Logic device architecture and method of operation'20016,160,419'Programmable logic architecture incorporating a content addressable embedded array block'20006,144,573'Programmable logic devices with improved content addressable memory capabilities'20006,134,705'Generation of sub-netlists for use in incremental compilation'20006,118,720'Programmable logic array device with random access memory configurable as product terms'20006,026,226'Local compilation in context within a design hierarchy'20006,020,759'Programmable logic array device with random access memory configurable as product terms'20005,999,015'Logic region resources for programmable logic devices'19995,982,195'Programmable logic device architectures'19995,983,277'Work group computing for electronic design automation'19995,963,049'Programmable logic array integrated circuit architectures'19995,909,126'Programmable logic array integrated circuit devices with interleaved logic array blocks'19995,850,152'Programmable logic array integrated circuit devices'19985,850,151'Programmable logic array intergrated circuit devices'19985,768,562'Methods for implementing logic in auxiliary components associated with programmable logic array devices'19985,670,895'Routing connections for programmable logic array integrated circuits'19975,485,103'Programmable logic array with local and global conductors'19965,436,575'Programmable logic array integrated circuits'19955,384,499'High-density erasable programmable logic device architecture using multiplexer interconnections'19955,376,844'Programmable logic device with multiplexer-based programmable interconnections'19945,268,598'High-density erasable programmable logic device architecture using multiplexer interconnections'19935,260,610'Programmable logic element interconnections for programmable logic array integrated circuits'19935,260,611'Programmable logic array having local and long distance conductors'19935,241,224'High-density erasable programmable logic device architecture using multiplexer interconnections'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2006Patents assigned to ALTERA CORP (46)· patent assignee history
1993–2006Based in Santa Clara, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ALTERA CORP | 46 | 1993–2006 |
Locations
| Location | Patents | Span |
|---|---|---|
| Santa Clara, California, US | 46 | 1993–2006 |