Inventor
Pradeep Thiagarajan
Inventor
South Burlington, VT, US
Overview
Patents· 41 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique49%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses16%
G06FElectric digital data processing13%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner4%
G01RMeasuring electric variables2%
G05DSystems for controlling or regulating non-electric variables2%
H03FAmplifiers2%
H03GControl of amplification2%
H04JMultiplex communication2%
PatentTitleYear
10,243,531Apparatus and method for centrally controlling common mode voltages for a set of receivers201910,164,648Phase error detection in phase lock loop and delay lock loop devices20189,762,183'Voltage-controlled ring oscillator with delay line'20179,735,789'Phase error detection in phase lock loop and delay lock loop devices'20179,673,805'Leakage current reduction in stacked field-effect transistors'20179,590,643'Phase error detection in phase lock loop and delay lock loop devices'20179,590,597'Voltage-controlled ring oscillator with delay line'20179,252,788'Phase error detection in phase lock loop and delay lock loop devices'20169,020,021'Precoding loss reduction'20159,009,520'Closed-loop multiphase slew rate controller for signal drive in a computer system'20158,981,831'Level shifter with built-in logic function for reduced delay'20158,803,569'Ramp generator using operational amplifier based integration and switched capacitor techniques'20148,793,365'Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes'20148,754,690'Programmable duty cycle setter employing time to voltage domain referenced pulse creation'20148,686,776'Phase rotator based on voltage referencing'20148,638,149'Equalized rise and fall slew rates for a buffer'20148,547,154'Programmable duty cycle selection using incremental pulse widths'20138,519,761'Closed-loop slew-rate control for phase interpolator optimization'20138,493,117'Leakage tolerant delay locked loop circuit device'20138,466,722'Startup and protection circuitry for thin oxide output stage'20138,410,835'Leakage tolerant phase locked loop circuit device'20138,302,037'Skewed double differential pair circuit for offset cancellation'20128,016,482'Method and systems of powering on integrated circuit'20117,928,812'Automated tuning in wide range multi-band VCO with internal reset concept'20117,770,139'Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path'20107,716,007'Design structures of powering on integrated circuit'20107,681,152'Design structures comprising voltage translator circuits'20107,545,191'Method for dividing a high-frequency signal'20097,511,548'Clock distribution network, structure, and method for providing balanced loading in integrated circuit clock trees'20097,483,806'Design structures, method and systems of powering on integrated circuit'20097,479,819'Clock distribution network, structure, and method for providing balanced loading in integrated circuit clock trees'20097,429,877'Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path'20087,403,039'Flexible multimode logic element for use in a configurable mixed-logic signal distribution path'20087,378,890'Programmable low-power high-frequency divider'20087,362,138'Flexible multimode logic element for use in a configurable mixed-logic signal distribution path'20087,342,429'Programmable low-power high-frequency divider'20087,288,981'Voltage translator circuits using capacitive techniques'20077,180,973'Programmable low-power high-frequency divider'20077,075,350'Programmable low-power high-frequency divider'20067,049,864'Apparatus and method for high frequency state machine divider with low power consumption'20066,917,662'Programmable low-power high-frequency divider'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2018Patents assigned to IBM (40)· patent assignee history
2005–2014Based in South Burlington, VT, US· patent location history
2010Based in Burlington, VT, US· patent location history
2011–2015Based in Essex Junction, VT, US· patent location history
2012–2015Patents assigned to THIAGARAJAN PRADEEP (10)· patent assignee history
2012–2014Patents assigned to ARSOVSKI IGOR (2)· patent assignee history
2013–2015Patents assigned to KOSSEL MARCEL A (5)· patent assignee history
2013–2015Patents assigned to LIM DAIHYUN (5)· patent assignee history
2013–2019Based in Chapel Hill, NC, US· patent location history
2015Based in Research Triangle Park, NC, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 40 | 2005–2018 |
| THIAGARAJAN PRADEEPself | 10 | 2012–2015 |
| KOSSEL MARCEL A | 5 | 2013–2015 |
| LIM DAIHYUN | 5 | 2013–2015 |
| ARSOVSKI IGOR | 2 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| South Burlington, VT, US | 19 | 2005–2014 |
| Chapel Hill, NC, US | 17 | 2013–2019 |
| Essex Junction, VT, US | 3 | 2011–2015 |
| Research Triangle Park, NC, US | 1 | 2015 |
| Burlington, VT, US | 1 | 2010 |