Inventor

Eric W. Mahurin

Inventor

Austin, TX, US

Overview

38→

Patents

1998–2020

Patent span

Physics

Primary field (CPC G)

Patents· 38 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing72%

H03KPulse technique6%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%

H03MCoding4%

B60WConjoint control of vehicle sub-units of different type or different function2%

G01RMeasuring electric variables2%

H03CModulation2%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses2%

H04JMultiplex communication2%

H04LTransmission of digital information, e.g. telegraphic communication2%

PatentTitleYear

10,860,051Proactive clock gating system to mitigate supply voltage droops2020 10,656,947Processor to perform a bit range isolation instruction2020 10,625,752System and method for online functional testing for error-correcting code function2020 10,579,379Processor to perform a bit range isolation instruction2020 10,579,380System-on-chip (SoC) to perform a bit range isolation instruction2020 10,489,155Mixed-width SIMD operations using even/odd register pairs for wide data elements2019 10,474,461Instruction-based synchronization of operations including at least one SIMD scatter operation2019 10,459,723SIMD instructions for multi-stage cube networks2019 10,459,731Sliding window operation2019 10,372,455Hand held device to perform a bit range isolation instruction2019 10,346,133System and method of floating point multiply operation processing2019 10,162,752Data storage at contiguous memory addresses2018 10,152,101Controlling voltage deviations in processing systems2018 9,678,758'Coprocessor for out-of-order loads'2017 9,092,213'Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation'2015 9,009,449'Reducing power consumption and resource utilization during miss lookahead'2015 9,003,170'Bit range isolation instructions, methods, and apparatus'2015 8,918,626'Prefetching load data in lookahead mode and invalidating architectural registers instead of writing results for retiring instructions'2014 7,821,298'Multiplexing using product-of-sums and sum-of-products'2010 7,401,310'Integrated circuit design with cell-based macros'2008 7,242,219'Circuit for parity tree structure'2007 6,539,470'Instruction decode unit producing instruction operand information in the order in which the operands are identified, and systems including same'2003 6,535,972'Shared dependency checking for status flags'2003 6,493,819'Merging narrow register for resolution of data dependencies when updating a portion of a register in a microprocessor'2002 6,460,130'Detecting full conditions in a queue'2002 6,380,724'Method and circuitry for an undisturbed scannable state element'2002 6,243,805'Programming paradigm and microprocessor architecture for exact branch targeting'2001 6,173,300'Method and circuit for determining leading or trailing zero count'2001 6,151,616'Method and circuit for detecting overflow in operand multiplication'2000 6,122,651'Method and apparatus for performing overshifted rotate through carry instructions by shifting in opposite directions'2000 6,094,669'Circuit and method for determining overflow in signed division'2000 6,065,034'Circuit and method employing an adder for sign extending operands'2000 6,041,341'Method and circuit for adding operands of multiple size'2000 6,035,310'Method and circuit for performing a shift arithmetic right operation'2000 6,006,244'Circuit for shifting or rotating operands of multiple size'1999 5,991,786'Circuit and method for shifting or rotating operands of multiple size'1999 5,926,407'Combined add/shift structure'1999 5,847,984'Combination propagate and generate carry lookahead gate'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–2008Patents assigned to ADVANCED MICRO DEVICES INC (19)· patent assignee history

1998–2020Based in Austin, TX, US· patent location history

2014–2015Patents assigned to MAHURIN ERIC W (4)· patent assignee history

2014–2015Patents assigned to CHOU YUAN C (2)· patent assignee history

2015–2020Patents assigned to INTEL CORP (6)· patent assignee history

2017–2020Patents assigned to QUALCOMM INC (10)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
ADVANCED MICRO DEVICES INC	19	1998–2008
QUALCOMM INC	10	2017–2020
INTEL CORP	6	2015–2020
MAHURIN ERIC Wself	4	2014–2015
CHOU YUAN C	2	2014–2015

Locations

Location	Patents	Span
Austin, Texas, US	38	1998–2020