Inventor

Manjin J. Kim

Inventor

Schenectady, NY, US

Overview

20→

Patents

1984–2001

Patent span

Electricity

Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices30%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1018%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1018%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests16%

H10BElectronic memory devices5%

C22BProduction and refining of metals2%

C23CCoating metallic material2%

G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein2%

G09FDisplaying2%

H01PWaveguides2%

PatentTitleYear

6,235,601'Method of manufacturing a self-aligned vertical bipolar transistor'2001 5,986,331'Microwave monolithic integrated circuit with coplaner waveguide having silicon-on-insulator composite substrate'1999 5,681,761'Microwave power SOI-MOSFET with high conductivity metal gate'1997 5,652,173'Monolithic microwave circuit with thick conductors'1997 5,486,485'Method of manufacturing a reflective display'1996 5,405,794'Method of producing VDMOS device of increased power density'1995 5,374,571'Vertical power MOS device with increased ruggedness and method of fabrication'1994 5,278,438'Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure'1994 5,268,586'Vertical power MOS device with increased ruggedness and method of fabrication'1993 5,229,312'Nonvolatile trench memory device and self-aligned method for making such a device'1993 4,998,151'Power field effect devices having small cell size and low contact resistance'1991 4,981,816'MO/TI Contact to silicon'1991 4,871,617'Ohmic contacts and interconnects to silicon and method of making same'1989 4,849,377'Active area planarization with self-aligned contacts'1989 4,845,050'Method of making mo/tiw or w/tiw ohmic contacts to silicon'1989 4,767,724'Unframed via interconnection with dielectric etch stop'1988 4,638,400'Refractory metal capacitor structures, particularly for analog integrated circuit devices'1987 4,583,281'Method of making an integrated circuit'1986 4,471,004'Method of forming refractory metal conductors of low resistivity'1984 4,429,011'Composite conductive structures and method of making same'1984

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1984–1991Patents assigned to GEN ELECTRIC (10)· patent assignee history

1984–1991Based in Schenectady, NY, US· patent location history

1991–1996Based in Ossining, NY, US· patent location history

1993–1994Patents assigned to PHILIPS CORP (4)· patent assignee history

1995–2001Patents assigned to PHILIPS ELECTRONICS NA (5)· patent assignee history

1995–2001Based in Hartsdale, NY, US· patent location history

1996Patents assigned to PHILIP ELECTRONICS NORTH AMERI (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
GEN ELECTRIC	10	1984–1991
PHILIPS ELECTRONICS NA	5	1995–2001
PHILIPS CORP	4	1993–1994
PHILIP ELECTRONICS NORTH AMERI	1	1996

Locations

Location	Patents	Span
Schenectady, New York, US	9	1984–1991
Ossining, New York, US	6	1991–1996
Hartsdale, New York, US	5	1995–2001