LexDanaLexDanabeta
Inventor

Yoshichika Nakaya

Inventor
Kasugai, JP

Overview

5→
Patents
1992–2015
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores71%
H01LSemiconductor devices14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
PatentTitleYear
9,082,469'Semiconductor memory device and writing method of ID codes and upper addresses'20157,352,638'Method and apparatus for testing a memory device'20087,239,553'Method and apparatus for reference cell adjusting in a storage device'20076,418,072'Semiconductor integrated circuit'20025,083,292'Bipolar random access memory'1992

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1992–2002Patents assigned to FUJITSU LTD (2)· patent assignee history
1992–2007Based in Kasugai, JP· patent location history
2007–2008Patents assigned to SPANSION LLC (2)· patent assignee history
2008Based in Kawasaki, JP· patent location history
2015Patents assigned to NAKAYA YOSHICHIKA (1)· patent assignee history
2015Patents assigned to OGAWA AKIRA (1)· patent assignee history
2015Patents assigned to POWERCHIP TECHNOLOGY CORP (1)· patent assignee history
2015Based in Tokyo, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FUJITSU LTD21992–2002
SPANSION LLC22007–2008
NAKAYA YOSHICHIKAself12015
OGAWA AKIRA12015
POWERCHIP TECHNOLOGY CORP12015
Locations
LocationPatentsSpan
Kasugai, JP31992–2007
Tokyo, JP12015
Kawasaki, JP12008