Inventor

Gary Gostin

Inventor

Plano, TX, US

Overview

1986–2021

Patent span

Physics

Primary field (CPC G)

Patents· 65 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing61%

H04LTransmission of digital information, e.g. telegraphic communication13%

G02BOptical elements, systems or apparatus6%

H04BTransmission5%

G11CStatic stores3%

Y10TTechnical subjects covered by former us classification3%

H05KPrinted circuits2%

B60QArrangement of signalling or lighting devices, the mounting or supporting thereof or circuits therefor, for vehicles in general1%

B60YIndexing scheme relating to aspects cross-cutting vehicle technology1%

G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes1%

PatentTitleYear

11,126,372External memory controller2021 11,030,061Single and double chip spare2021 11,016,683Serializing access to fault tolerant memory2021 10,740,235Using a directory-based cache coherence system to regulate snooping2020 10,599,598PCIe write request acknowledgment2020 10,579,519Interleaved access of memory2020 10,540,109Serializing access to fault tolerant memory2020 10,491,545Virtual channel routing2019 10,474,380External memory controller2019 10,452,498Fault tolerance for persistent main memory2019 10,419,367Queue buffer de-queuing2019 10,379,971Single and double chip space2019 10,355,978Calculating times to live for transaction requests2019 10,069,745Lossy fabric transmitting device2018 10,025,716Mapping processor address ranges to persistent storage2018 9,830,283Multi-mode agent2017 9,690,673'Single and double chip spare'2017 9,634,771'Optical connector interconnection system and method'2017 9,489,308'Cache line eviction based on write count'2016 9,342,452'Mapping processor address ranges to persistent storage'2016 9,274,297'Photonic waveguide'2016 9,207,416'Optical connector interconnection system and method'2015 8,898,246'Communication among partitioned devices'2014 8,732,331'Managing latencies in a multiprocessor interconnect'2014 8,724,936'Optical polymorphic computer systems'2014 8,705,911'Bus-based scalable optical fabrics'2014 8,611,707'System and methods for routing optical signals'2013 8,612,684'Memory controller connection to RAM using buffer interface'2013 8,539,164'Cache coherency within multiprocessor computer system'2013 7,908,422'System and method for a distributed crossbar network using a plurality of crossbars'2011 7,818,508'System and method for achieving enhanced memory access capabilities'2010 7,650,386'Communication among partitioned devices'2010 7,613,958'Error detection in a system having coupled channels'2009 7,606,253'Successful transactions'2009 7,577,890'Systems and methods for mitigating latency associated with error detection and correction'2009 7,568,063'System and method for a distributed crossbar network using a plurality of crossbars'2009 7,551,440'System and method for cooling an electronic component'2009 7,511,959'Scalable computing apparatus'2009 7,475,302'Decoded match circuit for performance counter'2009 7,471,623'Systems and methods for a unified computer system fabric'2008 7,437,651'System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem'2008 7,436,917'Controller for clock synchronizer'2008 7,406,091'Distribution of communications between paths'2008 7,404,112'Data selection circuit for performance counter'2008 7,363,402'Data communications architecture employing parallel SERDES channels'2008 7,363,427'Memory controller connection to RAM using buffer interface'2008 7,356,678'Security measures in a partitionable computing system'2008 7,313,749'System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table'2007 7,308,638'System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem'2007 7,296,146'Security measures in a partitionable computing system'2007 7,277,994'Communication in partitioned computer systems'2007 7,240,174'System and method for migrating data between memories'2007 7,216,205'Cache line ownership transfer in multi-processor computer systems'2007 7,206,889'Systems and methods for enabling communications among devices in a multi-cache line size environment and disabling communications among devices of incompatible cache line sizes'2007 7,178,015'Security measures in a partitionable computing system'2007 7,099,977'Processor interrupt filtering'2006 6,959,370'System and method for migrating data between memories'2005 6,564,306'Apparatus and method for performing speculative cache directory tag updates'2003 5,832,290'Apparatus, systems and method for improving memory bandwidth utilization in vector processing systems'1998 5,649,144'Apparatus, systems and methods for improving data cache hit rates'1997 5,159,686'Multi-processor computer system having process-independent communication register addressing'1992 5,050,070'Multi-processor computer system having self-allocating processors'1991 4,873,629'Instruction processing unit for computer'1989 4,812,972'Microcode computer having dispatch and main control stores for storing the first and the remaining microinstructions of machine instructions'1989 4,620,275'Computer system'1986

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1986–1992Based in Coppell, TX, US· patent location history

1989–1992Patents assigned to CONVEX COMPUTER CORP (4)· patent assignee history

1997–2021Based in Plano, TX, US· patent location history

2003–2019Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (39)· patent assignee history

2010–2011Based in Richardson, TX, US· patent location history

2013–2017Patents assigned to GOSTIN GARY (10)· patent assignee history

2013–2016Patents assigned to WARNER CRAIG (4)· patent assignee history

2016–2021Patents assigned to HEWLETT PACKARD ENTPR DEV LP (20)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
HEWLETT PACKARD DEVELOPMENT CO	39	2003–2019
HEWLETT PACKARD ENTPR DEV LP	20	2016–2021
GOSTIN GARYself	10	2013–2017
CONVEX COMPUTER CORP	4	1989–1992
WARNER CRAIG	4	2013–2016

Locations

Location	Patents	Span
Plano, Texas, US	58	1997–2021
Coppell, Texas, US	5	1986–1992
Richardson, Texas, US	2	2010–2011