Inventor

Sien G. Kang

Inventor
Pleasanton, CA, US

Overview

21→
Patents
1993–2018
Patent span
Electricity
Primary field (CPC H)

Patents· 21 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
H10DInorganic electric semiconductor devices10%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
C30BSingle-crystal growth8%
C23CCoating metallic material7%
H01LSemiconductor devices6%
H10HInorganic light-emitting semiconductor devices having potential barriers6%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation3%
G05BControl or regulating systems in general1%
PatentTitleYear
10,164,144Bond and release layer transfer process201810,041,187Techniques for forming optoelectronic devices20189,859,458'Bond and release layer transfer process'20189,257,339'Techniques for forming optoelectronic devices'20168,187,377'Non-contact etch annealing of strained layers'20128,133,800'Free-standing thickness of single crystal material and method having carrier lifetimes'20127,598,153'Method and structure for fabricating bonded substrate structures using thermal processing to remove oxygen species'20097,253,081'Surface finishing of SOI substrates using an EPI process'20076,969,668'Treatment method of film quality for the manufacture of substrates'20056,881,644'Smoothing method for cleaved films made using a release layer'20056,455,399'Smoothing method for cleaved films made using thermal treatment'20026,448,152'Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer'20026,391,219'Smoothing method for cleaved films made using a release layer'20026,287,941'Surface finishing of SOI substrates using an EPI process'20016,204,151'Smoothing method for cleaved films made using thermal treatment'20016,171,965'Treatment method of cleaved film for the manufacture of substrates'20016,130,159'Apparatus and methods for minimizing as-deposited stress in tungsten silicide films'20005,963,836'Methods for minimizing as-deposited stress in tungsten silicide films'19995,447,570'Purge gas in wafer coating area selection'19955,387,289'Film uniformity by selective pressure gradient control'19955,272,112'Low-temperature low-stress blanket tungsten film'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–2000Patents assigned to GENUS INC (5)· patent assignee history
1993–2000Based in Tracy, CA, US· patent location history
2001–2016Patents assigned to SILICON GENESIS CORP (12)· patent assignee history
2001–2007Based in Pleasanton, CA, US· patent location history
2009–2018Based in Dublin, CA, US· patent location history
2012Patents assigned to CURRENT MICHAEL IRA (1)· patent assignee history
2012Patents assigned to FLAT ARIEL (1)· patent assignee history
2018Patents assigned to QMAT INC (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SILICON GENESIS CORP122001–2016
GENUS INC51993–2000
QMAT INC32018
CURRENT MICHAEL IRA12012
FLAT ARIEL12012
Locations
LocationPatentsSpan
Pleasanton, California, US92001–2007
Dublin, California, US72009–2018
Tracy, California, US51993–2000