Inventor
Hartmut R. Schwermer
Inventor
Stuttgart, DE
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
6,968,476'Checkpointing a superscalar, out-of-order processor for error recovery'20055,930,491'Identification of related instructions resulting from external to internal translation by use of common ID field for each group'19995,925,124'Dynamic conversion between different instruction codes by recombination of instruction elements'19995,509,124'Coupled synchronous-asychronous bus structure for transferring data between a plurality of peripheral input/output controllers and a main data store'19965,455,916'Method for performing inter-unit data transfer operations among a plurality of input/output bus interface units coupled to a common asynchronous bus'19955,276,814'Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses'19945,199,106'Input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the bus'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2005Patents assigned to IBM (7)· patent assignee history
1993–2005Based in Stuttgart, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 7 | 1993–2005 |
Locations
| Location | Patents | Span |
|---|---|---|
| Stuttgart, DE | 7 | 1993–2005 |