Inventor
IAN P. SHAEFFER
Inventor
US
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing36%
G11CStatic stores28%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%
H03KPulse technique8%
H04LTransmission of digital information, e.g. telegraphic communication8%
G09GArrangements or circuits for control of indicating devices using static means to present variable information3%
H01RElectrically-conductive connections3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H04NPictorial communication, e.g. television3%
PatentTitleYear
12,395,173Integrated circuit that applies different data interface terminations during and after write data reception202512,249,392Memory controller with staggered request signal output202512,189,548Buffer IC with asymmetric memory module interfaces202512,190,990Deferred fractional memory row activation202512,066,958Clock generation for timing communications with ranks of memory devices202412,055,984Computer in an input device202411,830,573Memory controller with staggered request signal output202311,804,250Memory with deferred fractional row activation202311,790,962Strobe acquisition and tracking202311,741,041Interface bus resource allocation202311,636,801Computer console for throttling the video bitrate of video streams to interface with an electronic device202311,630,788Clock generation for timing communications with ranks of memory devices202311,349,478Integrated circuit that applies different data interface terminations during and after write data reception202211,302,368Memory device with circuitry to transmit feedback indicative of a phase relationship202211,270,741Deferred fractional memory row activation202211,200,181Asymmetric-channel memory system202111,188,141Voltage region sensing for maximum system power202111,176,280Secure circuit control to disable circuitry2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to RAMBUS INC (13)· patent assignee history
2021–2024Patents assigned to APPLE INC (5)· patent assignee history
2021–2025Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| RAMBUS INC | 13 | 2021–2025 |
| APPLE INC | 5 | 2021–2024 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 18 | 2021–2025 |