Inventor
Pitamber SHUKLA
Inventor
US
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores54%
G06FElectric digital data processing44%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use2%
PatentTitleYear
12,591,371Memory sub-system for memory cell in-field touch-up202612,578,867Solid state drive with concurrent read execution and erase execution202612,547,332Reuse of bad blocks for tasks in a memory sub-system202612,493,415Program pulse modification202512,461,661Dynamic block categorization to improve reliability and performance in memory sub-system202512,451,208Charge loss tracking through targeted bit count202512,443,520Dynamic word line allocation in memory systems202512,412,616Probabilistic data integrity scans using risk factor estimation202512,387,795Low stress refresh erase in a memory device202512,322,451Memory systems with flexible erase suspend-resume operations, and associated systems, devices, and methods202512,322,473Determining read voltage offset in memory devices202512,293,795Managing defective blocks during multi-plane programming operations in memory devices202512,229,024Memory system failure detection and self recovery of memory dice202512,153,490Read calibration by sector of memory202412,124,705Memory operation based on block-associated temperature202412,106,813Dynamic prioritization of selector V202412,068,036Adaptive erase pulse width modulation based on erase suspend during erase pulse ramping period202412,057,190Determining read voltage offset in memory devices202411,972,114Dynamic block categorization to improve reliability and performance in memory sub-system202411,966,303Memory system failure detection and self recovery of memory dice202411,967,386Memory sub-system for memory cell touch-up202411,847,335Latent read disturb mitigation in memory devices202311,797,376Adaptive background scans in a memory sub-system202311,709,616Adjusting a preprogram voltage based on use of a memory device202311,693,587System driven pass-through voltage adjustment to improve read disturb in memory devices202311,626,163Program voltage step based on program-suspend time202311,594,292Power loss immunity in memory programming operations202311,556,410Adaptive background scans in a memory sub-system202311,468,949Temperature-dependent operations in a memory device202211,461,035Adjusting a preprogram voltage based on use of a memory device202211,443,812Setting an initial erase voltage using feedback from previous operations2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to MICRON TECHNOLOGY INC (30)· patent assignee history
2022–2026Based in US· patent location history
2026Patents assigned to MICROCHIP TECH INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 30 | 2022–2026 |
| MICROCHIP TECH INC | 1 | 2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 31 | 2022–2026 |