Inventor

Shyi-Shuh Pan

Inventor

Kaohsiung, TW

Overview

26→

Patents

2002–2005

Patent span

Electricity

Primary field (CPC H)

Patents· 26 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Bprimary

H10BElectronic memory devices40%

H10DInorganic electric semiconductor devices40%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%

G11CStatic stores2%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%

PatentTitleYear

6,972,230'Method for fabricating a floating gate memory device'2005 6,876,044'UV-programmable P-type mask ROM'2005 6,818,956'Non-volatile memory device and fabrication method thereof'2004 6,812,507'Non-volatile memory capable of preventing antenna effect and fabrication thereof'2004 6,794,701'Non-volatile memory'2004 6,787,416'Non volatile embedded memory with poly protection layer'2004 6,723,603'Method of utilizing fabrication process of poly-Si spacer to build flash memory with 2bit/cell'2004 6,713,315'Mask read-only memory and fabrication thereof'2004 6,680,227'Non-volatile memory device and fabrication method thereof'2004 6,664,164'UV-programmed P-type Mask ROM and fabrication thereof'2003 6,642,113'Non-volatile memory capable of preventing antenna effect and fabrication thereof'2003 6,627,500'Method of fabricating nitride read only memory'2003 6,620,694'Method of making non volatile memory with a protective metal line'2003 6,613,632'Fabrication method for a silicon nitride read-only memory'2003 6,580,630'Initialization method of P-type silicon nitride read only memory'2003 6,559,010'Method for forming embedded non-volatile memory'2003 6,551,880'Method of utilizing fabrication process of floating gate spacer to build twin-bit monos/sonos memory'2003 6,511,882'Method for preventing the leakage path in embedded non-volatile memory'2003 6,469,342'Silicon nitride read only memory that prevents antenna effect'2002 6,448,126'Method of forming an embedded memory'2002 6,448,137'Method of forming an NROM embedded with mixed-signal circuits'2002 6,444,519'Method for forming a capacitor in a mixed mode circuit device by ion implantation'2002 6,440,798'Method of forming a mixed-signal circuit embedded NROM memory and MROM memory'2002 6,436,800'Method for fabricating a non-volatile memory with a shallow junction'2002 6,432,778'Method of forming a system on chip (SOC) with nitride read only memory (NROM)'2002 6,413,815'Method of forming a MIM capacitor'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2005Patents assigned to MACRONIX INT CO LTD (26)· patent assignee history

2002–2005Based in Kaohsiung, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MACRONIX INT CO LTD	26	2002–2005

Locations

Location	Patents	Span
Kaohsiung, TW	26	2002–2005