Inventor
Richard E. Warmke
Inventor
San Jose, CA, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores29%
G06FElectric digital data processing21%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses21%
H04LTransmission of digital information, e.g. telegraphic communication21%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
G09GArrangements or circuits for control of indicating devices using static means to present variable information2%
PatentTitleYear
10,699,769Methods and apparatus for synchronizing communication with a memory controller202010,192,610Methods and apparatus for synchronizing communication with a memory controller20199,741,423'Methods and apparatus for synchronizing communication with a memory controller'20179,466,353'Methods and apparatus for synchronizing communication with a memory controller'20169,159,388'Methods and apparatus for synchronizing communication with a memory controller'20158,666,007'Methods and apparatus for synchronizing communication with a memory controller'2014RE044019'Stacked semiconductor module'20138,355,480'Methods and apparatus for synchronizing communication with a memory controller'20138,208,595'Apparatus for data recovery in a synchronous chip-to-chip system'20127,970,089'Apparatus for data recovery in a synchronous chip-to-chip system'20117,627,066'Apparatus for data recovery in a synchronous chip-to-chip system'20097,349,510'Apparatus for data recovery in a synchronous chip-to-chip system'20087,285,443'Stacked semiconductor module'20077,037,757'Stacked semiconductor module'20066,836,503'Apparatus for data recovery in a synchronous chip-to-chip system'20046,825,841'Granularity memory column access'20046,720,643'Stacked semiconductor module'20046,570,944'Apparatus for data recovery in a synchronous chip-to-chip system'20036,542,416'Methods and arrangements for conditionally enforcing CAS latencies in memory devices'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2020Patents assigned to RAMBUS INC (19)· patent assignee history
2003–2015Based in San Jose, CA, US· patent location history
2012–2013Patents assigned to BEST SCOTT C (2)· patent assignee history
2012–2013Patents assigned to ROBERTS DAVID B (2)· patent assignee history
2012–2013Patents assigned to WARMKE RICHARD E (2)· patent assignee history
2013Patents assigned to FOX THOMAS F (1)· patent assignee history
2013–2020Based in Truckee, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| RAMBUS INC | 19 | 2003–2020 |
| BEST SCOTT C | 2 | 2012–2013 |
| ROBERTS DAVID B | 2 | 2012–2013 |
| WARMKE RICHARD Eself | 2 | 2012–2013 |
| FOX THOMAS F | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 14 | 2003–2015 |
| Truckee, California, US | 5 | 2013–2020 |