Inventor
Jung-Hun Heo
Inventor
Suwon-si, KR
Overview
11→
Patents
2008–2019
Patent span
General tagging of new technological developments
Primary field (CPC Y)
Patents· 11 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
Y02Dprimary
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use26%
G06FElectric digital data processing24%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications12%
H03KPulse technique9%
H04BTransmission6%
H04LTransmission of digital information, e.g. telegraphic communication6%
G01SRadio direction-finding3%
G05FSystems for regulating electric or magnetic variables3%
G11CStatic stores3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
PatentTitleYear
10,254,813Method of operating semiconductor device201910,075,153Low-power clock-gated synchronizer, a data processing system that incorporates the same and a synchronization method20189,880,608'Application processor for adjusting clock signal using hardware power management unit and devices including the same'20189,870,043'Memory device of adaptively calibrating timing margin and integrated circuit including the same'20189,489,037'Power management device and system-on-chip including the same'20169,298,251'Methods of spreading plurality of interrupts, interrupt request signal spreader circuits, and systems-on-chips having the same'20169,146,880'System-on-chip for providing access to shared memory via chip-to-chip link, operation method of the same, and electronic system including the same'20159,054,680'Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same'20158,928,385'Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same'20158,401,114'Mobile telecommunication device and ramping data transmitting method thereof'20137,471,747'Bit down-scaling apparatus and method, GPS synchronization acquisition method, and GPS receiver'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2019Patents assigned to SAMSUNG ELECTRONICS CO LTD (11)· patent assignee history
2008–2018Based in Suwon-si, KR· patent location history
2013–2018Patents assigned to HEO JUNG-HUN (3)· patent assignee history
2015Patents assigned to HEO JUNG HUN (2)· patent assignee history
2015Patents assigned to KIM DONG KEUN (2)· patent assignee history
2015Patents assigned to KIM SI YOUNG (2)· patent assignee history
2015Based in Hwaseong-si, KR· patent location history
2019Based in Gyeonggi-do, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 11 | 2008–2019 |
| HEO JUNG-HUNself | 3 | 2013–2018 |
| HEO JUNG HUNself | 2 | 2015 |
| KIM DONG KEUN | 2 | 2015 |
| KIM SI YOUNG | 2 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Suwon-si, KR | 9 | 2008–2018 |
| Gyeonggi-do, KR | 1 | 2019 |
| Hwaseong-si, KR | 1 | 2015 |