Inventor
JHEN-YU TSAI
Inventor
TW
Overview
Patents· 30 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices30%
H10BElectronic memory devices25%
H01LSemiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
G11CStatic stores3%
PatentTitleYear
12,507,402Memory with a contact between a data storage device and a data processing device202512,484,284Buried gate semiconductor device with reduced gate induced drain leakage202512,477,780Semiconductor structure including multiple gate electrodes202512,477,806Semiconductor device having buried gate structure202512,457,730Method for manufacturing semiconductor device having buried gate structure202512,453,084Method for manufacturing a semiconductor memory202512,426,339Buried gate semiconductor device having a dielectric layer between two electrodes202512,414,292Method for manufacturing memory device having word line with dual conductive materials202512,342,571Method for manufacturing semiconductor device with passing gate202512,328,868Memory structure including low dielectric constant capping layer202512,317,571Semiconductor device and method for manufacturing the same202512,310,002Semiconductor device202512,274,050Semiconductor device with passing gate202512,268,029Method for manufacturing semiconductor device202512,029,028Method of manufacturing semiconductor device202412,009,424Semiconductor device, and method for manufacturing the same202411,984,511Manufacturing method of semiconductor device202411,978,785Method of manufacturing semiconductor structure having a fin feature202411,894,427Semiconductor device, and method for manufacturing the same202411,832,440Method of forming memory device202311,721,759Method for forming gate metal structure having portions with different heights202311,659,704Method for manufacturing semiconductor structure with vertical gate transistor202311,640,979Method of manufacturing semiconductor device202311,563,007Semiconductor structure with vertical gate transistor202311,482,419Method for preparing transistor device202211,424,360Semiconductor device and method for manufacturing the same202211,417,662Memory device and method of forming the same202211,244,950Method for preparing a memory device202211,217,589Semiconductor device and method of manufacturing the same202211,205,651Memory structure and method for manufacturing the same2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to NANYA TECHNOLOGY CORP (30)· patent assignee history
2021–2025Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NANYA TECHNOLOGY CORP | 30 | 2021–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 30 | 2021–2025 |