Inventor
Ching-Nan Hsiao
Inventor
Kaohsiung, TW
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices51%
H10DInorganic electric semiconductor devices47%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
8,330,198'Device for preventing current-leakage'20128,148,766'Nonvolatile memory cell'20128,105,900'Manufacturing method of non-volatile memory'20128,003,480'Process using oxide supporter for manufacturing a capacitor lower electrode of a micro stacked DRAM'20117,981,743'Method of fabricating a memory cell'20117,972,924'Method for manufacturing a memory'20117,868,377'Layout and structure of memory'20117,855,124'Method for forming a semiconductor device'20107,781,804'Non-volatile memory'20107,781,279'Method for manufacturing a memory'20107,714,445'Dynamic random access memory with an electrostatic discharge structure and method for manufacturing the same'20107,713,820'Method for manufacturing non-volatile memory'20107,700,991'Two bit memory structure and method of making the same'20107,682,902'Memory structure and method of making the same'20107,642,191'Method of forming semiconductor structure'20107,576,381'Memory structure and fabricating method thereof'20097,482,227'Method for manufacturing a flash memory'20097,476,929'Multi-bit stacked-type non-volatile memory'20097,135,731'Vertical DRAM and fabrication method thereof'20067,022,573'Stack gate with tip vertical memory and method for fabricating the same'20067,005,701'Method for fabricating a vertical NROM cell'20066,995,061'Multi-bit stacked-type non-volatile memory and manufacture method thereof'20066,916,715'Method for fabricating a vertical NROM cell'20056,870,216'Stack gate with tip vertical memory and method for fabricating the same'20056,808,987'Vertical nitride read-only memory cell and method for forming the same'20046,670,246'Method for forming a vertical nitride read-only memory'20036,653,188'Method of forming poly tip of floating gate in split-gate memory'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2012Patents assigned to NANYA TECHNOLOGY CORP (25)· patent assignee history
2003–2012Based in Kaohsiung, TW· patent location history
2009–2010Based in Taoyuan, TW· patent location history
2010Based in Taipei, TW· patent location history
2011–2012Patents assigned to INOTERA MEMORIES INC (2)· patent assignee history
2012Patents assigned to HSIAO CHING-NAN (3)· patent assignee history
2012Patents assigned to HUANG CHUNG-LIN (3)· patent assignee history
2012Patents assigned to HUANG SHIN BIN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NANYA TECHNOLOGY CORP | 25 | 2003–2012 |
| HSIAO CHING-NANself | 3 | 2012 |
| HUANG CHUNG-LIN | 3 | 2012 |
| INOTERA MEMORIES INC | 2 | 2011–2012 |
| HUANG SHIN BIN | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kaohsiung, TW | 24 | 2003–2012 |
| Taoyuan, TW | 2 | 2009–2010 |
| Taipei, TW | 1 | 2010 |