Inventor
Kazunobu Ohta
Inventor
Tokyo, JP
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices35%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1029%
H10BElectronic memory devices24%
H01LSemiconductor devices10%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%
PatentTitleYear
9,847,417Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same20179,614,081'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20179,412,867'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20169,209,191'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20158,952,315'Solid-state imaging device having a vertical transistor with a dual polysilicon gate'20158,809,186'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20148,586,475'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20138,372,747'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20137,960,281'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20117,470,618'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20087,183,204'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20076,906,393'Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same'20056,872,642'Manufacturing method of semiconductor device'20056,869,865'Method of manufacturing semiconductor device'20056,864,128'Manufacturing method for a semiconductor device'20056,835,610'Method of manufacturing semiconductor device having gate electrode with expanded upper portion'20046,740,939'Semiconductor device and manufacturing method thereof'20046,333,222'Semiconductor device and manufacturing method thereof'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001Based in Hyogo, JP· patent location history
2004–2008Patents assigned to RENESAS TECH CORP (8)· patent assignee history
2004–2017Based in Tokyo, JP· patent location history
2005Patents assigned to ION ENGINEERING RES INST CORP (1)· patent assignee history
2011–2017Patents assigned to RENESAS ELECTRONICS CORP (8)· patent assignee history
2013–2015Patents assigned to OHTA KAZUNOBU (2)· patent assignee history
2015Patents assigned to HIRANO TOMOYUKI (1)· patent assignee history
2015Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| RENESAS ELECTRONICS CORP | 8 | 2011–2017 |
| RENESAS TECH CORP | 8 | 2004–2008 |
| OHTA KAZUNOBUself | 2 | 2013–2015 |
| HIRANO TOMOYUKI | 1 | 2015 |
| ION ENGINEERING RES INST CORP | 1 | 2005 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 16 | 2004–2017 |
| Kanagawa, JP | 1 | 2015 |
| Hyogo, JP | 1 | 2001 |