Inventor

Ira E. Baskett

Inventor
Tempe, AZ, US

Overview

24→
Patents
1986–2008
Patent span
Electricity
Primary field (CPC H)

Patents· 24 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary
H03KPulse technique24%
G01LMeasuring force, stress, torque, work, mechanical power, mechanical efficiency, or fluid pressure16%
H03FAmplifiers14%
G11CStatic stores11%
G05FSystems for regulating electric or magnetic variables5%
Y10TTechnical subjects covered by former us classification5%
G01DMeasuring not specially adapted for a specific variable3%
G01PMeasuring linear or angular speed, acceleration, deceleration, or shock3%
G06FElectric digital data processing3%
G06GAnalogue computers3%
PatentTitleYear
7,397,288'Fan out buffer and method therefor'20087,218,174'Delay circuit and method therefor'20077,196,549'Interface system and method therefor'20077,135,924'Cross-talk reduction circuit and method therefor'20067,129,781'High slew ECL device and method therefor'20067,119,618'Method of forming a wide bandwidth differential amplifier and structure therefor'20066,906,580'Method of forming a reference voltage generator and structure therefor'20056,333,672'Differential logic circuit and method of use'20016,308,577'Circuit and method of compensating for membrane stress in a sensor'20016,150,917'Piezoresistive sensor bridge having overlapping diffused regions to accommodate mask misalignment and method'20005,770,965'Circuit and method of compensating for non-linearities in a sensor signal'19985,589,703'Edge die bond semiconductor package'19965,551,304'Method for setting sensing polarity of a sensor device'19965,387,316'Wafer etch protection method'19955,250,847'Stress isolating signal path for integrated circuits'19935,132,559'Circuit for trimming input offset voltage utilizing variable resistors'19925,110,758'Method of heat augmented resistor trimming'19925,031,461'Matched pair of sensor and amplifier circuits'19914,760,249'Logic array having multiple optical logic inputs'19884,730,130'Writable array logic'19884,730,275'Circuit for reducing the row select voltage swing in a memory array'19884,716,547'Current switch for programming vertical fuses of a read only memory'19874,712,193'Current steering differential write circuit for memory cells'19874,585,959'Tri-state logic gate having reduced Miller capacitance'1986

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1986–2001Patents assigned to MOTOROLA INC (16)· patent assignee history
1986–2008Based in Tempe, AZ, US· patent location history
2001–2008Patents assigned to SEMICONDUCTOR COMPONENTS IND (8)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MOTOROLA INC161986–2001
SEMICONDUCTOR COMPONENTS IND82001–2008
Locations
LocationPatentsSpan
Tempe, AZ, US241986–2008