Inventor
Szu-Yu Wang
Inventor
Hsinchu, TW
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices28%
H10BElectronic memory devices17%
H01LSemiconductor devices17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
G11CStatic stores10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
H10NElectric solid-state devices not otherwise provided for2%
H04BTransmission1%
H04JMultiplex communication1%
PatentTitleYear
10,833,026Integrated circuit with backside structures to reduce substrate warp202010,777,649Silicon nano-tip thin film for flash memory cells202010,497,560Uniformity control for Si dot size in flash memory201910,497,860Perpendicular magnetic random-access memory (MRAM) formation by direct self-assembly method201910,276,513Integrated circuit with backside structures to reduce substrate warp201910,276,678Semiconductor device and fabrication method thereof201910,170,539Stacked capacitor with enhanced capacitance20199,929,007'e-Flash Si dot nitrogen passivation for trap reduction'20189,871,095'Stacked capacitor with enhanced capacitance and method of manufacturing the same'20189,754,827'Semiconductor device and fabrication method thereof'20179,755,860'Method of performing uplink channel estimation and base station using the same'20179,685,518'Method of forming semiconductor structure of control gate, and semiconductor device'20179,646,938'Integrated circuit with backside structures to reduce substrate warp'20179,634,105'Silicon nano-tip thin film for flash memory cells'20179,577,077'Well controlled conductive dot size in flash memory'20179,401,434'E-flash cell band engineering for erasing speed enhancement'20169,385,136'Silicon dot formation by self-assembly method and selective silicon growth for flash memory'20169,281,203'Silicon dot formation by direct self-assembly method for flash memory'20169,257,636'Perpendicular magnetic random-access memory (MRAM) formation by direct self-assembly method'20169,209,190'Deep trench capacitor'20159,184,041'Integrated circuit with backside structures to reduce substrate warp'20159,064,821'Silicon dot formation by self-assembly method and selective silicon growth for flash memory'20158,730,726'Multi-gate bandgap engineered memory'20148,315,095'Multi-gate bandgap engineered memory'20128,264,028'Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays'20128,149,628'Operating method of non-volatile memory device'20128,094,497'Multi-gate bandgap engineered memory'20127,879,738'Charge trapping dielectric structure for non-volatile memory'20117,772,072'Method for manufacturing non-volatile memory'20107,688,626'Depletion mode bandgap engineered memory'20107,642,585'Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays'20107,529,137'Methods of operating bandgap engineered memory'20097,463,530'Operating method of non-volatile memory device'20087,405,125'Tunnel oxynitride in flash memories'20087,314,796'Methods for reducing wordline sheet resistance'20087,060,594'Memory device and method of manufacturing including deuterated oxynitride charge trapping structure'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006–2014Patents assigned to MACRONIX INT CO LTD (14)· patent assignee history
2006–2010Based in Shiaugang Chiu, TW· patent location history
2008–2020Based in Hsinchu, TW· patent location history
2011Based in Kaoshing, TW· patent location history
2012Patents assigned to LUE HANG-TING (4)· patent assignee history
2012Patents assigned to WANG SZU-YU (3)· patent assignee history
2012–2014Based in Kaohsiung, TW· patent location history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (21)· patent assignee history
2017Patents assigned to IND TECH RES INST (1)· patent assignee history
2017Based in New Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 21 | 2015–2020 |
| MACRONIX INT CO LTD | 14 | 2006–2014 |
| LUE HANG-TING | 4 | 2012 |
| WANG SZU-YUself | 3 | 2012 |
| IND TECH RES INST | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 25 | 2008–2020 |
| Kaohsiung, TW | 5 | 2012–2014 |
| Shiaugang Chiu, TW | 4 | 2006–2010 |
| New Taipei, TW | 1 | 2017 |
| Kaoshing, TW | 1 | 2011 |