Inventor
Wallace W. Lin
Inventor
San Jose, CA, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices17%
G06FElectric digital data processing14%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H01LSemiconductor devices10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
H04LTransmission of digital information, e.g. telegraphic communication7%
A61MDevices for introducing media into, or onto, the body3%
G02BOptical elements, systems or apparatus3%
G03BApparatus or arrangements for taking photographs or for projecting or viewing them3%
G07GRegistering the receipt of cash, valuables, or tokens3%
PatentTitleYear
11,061,305Light path adjustment mechanism20219,996,654Transistor plasma charging evaluator20189,922,892'Method and apparatus for bond-pad charging protection of transistor test structures'20189,916,413'Transistor plasma charging metal design rule generator'20189,852,248Transistor plasma charging eliminator20179,799,573'Method and apparatus for bond-pad charging protection of reference transistor test structures'20178,001,492'Evaluation method for interconnects interacted with integrated-circuit manufacture'20117,974,055'Method for protecting circuits from damage due to currents and voltages during manufacture'20116,960,784'Charging sensor method and apparatus'20056,741,593'Circuit architecture and method for displaying port status in data communications switching system'20046,624,480'Arrangements to reduce charging damage in structures of integrated circuits'20036,574,194'Architecture of data communications switching system and associated method'20036,566,716'Arrangements to reduce charging damage in structures of integrated circuits using polysilicon or metal plate(s)'20036,414,358'Arrangements to reduce charging damage in structures of integrated circuits'20025,528,235'Multi-status multi-function data processing key and key array'19965,250,029'Zero-residual zero-tip balloon catheter'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993Patents assigned to LIN EDWARD (1)· patent assignee history
1993–1996Based in Sunnyvale, CA, US· patent location history
1996Patents assigned to LIN EDWARD D (1)· patent assignee history
2002–2005Patents assigned to INTEL CORP (4)· patent assignee history
2002–2018Based in San Jose, CA, US· patent location history
2003–2004Patents assigned to CYPRESS SEMICONDUCTOR CORP (2)· patent assignee history
2011–2018Patents assigned to LIN WALLACE W (6)· patent assignee history
2021Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LIN WALLACE Wself | 6 | 2011–2018 |
| INTEL CORP | 4 | 2002–2005 |
| CYPRESS SEMICONDUCTOR CORP | 2 | 2003–2004 |
| LIN EDWARD | 1 | 1993 |
| LIN EDWARD D | 1 | 1996 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 13 | 2002–2018 |
| Sunnyvale, California, US | 2 | 1993–1996 |
| Hsinchu, TW | 1 | 2021 |