Inventor
Daniel Xu
Inventor
Mountain View, CA, US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Nprimary
H10NElectric solid-state devices not otherwise provided for25%
H10BElectronic memory devices24%
G11CStatic stores21%
H10DInorganic electric semiconductor devices10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
E05BLocks2%
H01LSemiconductor devices2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
9,780,164'Silicon-on-insulator radio frequency device and silicon-on-insulator substrate'20178,536,637'Array architecture for embedded flash memory devices'20138,350,356'Anti-fuse based programmable serial number generator'20137,906,391'Reducing leakage currents in memories with phase-change material'20117,685,854'Axial spring balancing pin tumbler lock'20107,422,917'Forming tapered lower electrode phase-change memories'20087,161,225'Reducing shunts in memories with phase-change material'20077,064,344'Barrier material encapsulation of programmable material'20066,992,365'Reducing leakage currents in memories with phase-change material'20066,933,516'Forming tapered lower electrode phase-change memories'20056,878,618'Compositionally modified resistive electrode'20056,869,841'Carbon-containing interfacial layer for phase-change memory'20056,861,267'Reducing shunts in memories with phase-change material'20056,800,563'Forming tapered lower electrode phase-change memories'20046,673,700'Reduced area intersection between electrode and programming element'20046,667,900'Method and apparatus to operate a memory cell'20036,642,102'Barrier material encapsulation of programmable material'20036,566,700'Carbon-containing interfacial layer for phase-change memory'20036,563,164'Compositionally modified resistive electrode'20036,514,805'Trench sidewall profile for device isolation'20036,462,984'Biasing scheme of floating unselected wordlines and bitlines of a diode-based memory array'20026,437,383'Dual trench isolation for a phase-change memory cell and method of making same'20026,404,665'Compositionally modified resistive electrode'20026,265,292'Method of fabrication of a novel flash integrated circuit'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2007Patents assigned to INTEL CORP (9)· patent assignee history
2001–2011Based in Mountain View, CA, US· patent location history
2003–2011Patents assigned to OVONYX INC (11)· patent assignee history
2005–2007Based in Santa Clara, CA, US· patent location history
2010–2013Patents assigned to XU DANIEL (3)· patent assignee history
2010Based in West Covina, CA, US· patent location history
2013Patents assigned to SEMICONDUCTOR MFG INT SHANGHAI (2)· patent assignee history
2013Patents assigned to LEE ROGER (1)· patent assignee history
2013–2017Based in Shanghai, CN· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| OVONYX INC | 11 | 2003–2011 |
| INTEL CORP | 9 | 2001–2007 |
| XU DANIELself | 3 | 2010–2013 |
| SEMICONDUCTOR MFG INT SHANGHAI | 2 | 2013 |
| LEE ROGER | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mountain View, California, US | 18 | 2001–2011 |
| Shanghai, CN | 3 | 2013–2017 |
| Santa Clara, California, US | 2 | 2005–2007 |
| West Covina, California, US | 1 | 2010 |